diff options
author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2017-04-03 12:55:17 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-05-03 13:51:21 +0200 |
commit | 70a86eb2fd8247904818e57776b4570b470eeabe (patch) | |
tree | c33633c4cdc798325684c99dcfe9c2df952f49d7 /arch/arm | |
parent | 49c2421feecf7402f69f4d0ea82004c0c5ee1746 (diff) | |
download | barebox-70a86eb2fd8247904818e57776b4570b470eeabe.tar.gz barebox-70a86eb2fd8247904818e57776b4570b470eeabe.tar.xz |
ARM: socfpga: rename socfpga->cyclone5
Prepare the SoCFPGA code base for different system types
(Arria10, Stratix10,...).
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
38 files changed, 266 insertions, 65 deletions
diff --git a/arch/arm/boards/altera-socdk/board.c b/arch/arm/boards/altera-socdk/board.c index d7fb923a04..f4b1dcd324 100644 --- a/arch/arm/boards/altera-socdk/board.c +++ b/arch/arm/boards/altera-socdk/board.c @@ -8,7 +8,7 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> static int ksz9021rn_phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c b/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c index 07a4485f1f..9777d15dfe 100644 --- a/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c +++ b/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/scan-manager.h> +#include <mach/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { diff --git a/arch/arm/boards/altera-socdk/lowlevel.c b/arch/arm/boards/altera-socdk/lowlevel.c index 02c995fe45..8cfe839159 100644 --- a/arch/arm/boards/altera-socdk/lowlevel.c +++ b/arch/arm/boards/altera-socdk/lowlevel.c @@ -7,13 +7,13 @@ #include <debug_ll.h> #include <asm/cache.h> #include "sdram_config.h" -#include <mach/sdram_config.h> +#include <mach/cyclone5-sdram-config.h> #include "pinmux_config.c" #include "pll_config.h" #include <mach/pll_config.h> #include "sequencer_defines.h" #include "sequencer_auto.h" -#include <mach/sequencer.c> +#include <mach/cyclone5-sequencer.c> #include "sequencer_auto_inst_init.c" #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" diff --git a/arch/arm/boards/ebv-socrates/board.c b/arch/arm/boards/ebv-socrates/board.c index f3207b88ef..965150f9a3 100644 --- a/arch/arm/boards/ebv-socrates/board.c +++ b/arch/arm/boards/ebv-socrates/board.c @@ -11,7 +11,7 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> static int phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c b/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c index ab6733f92b..9a814cba79 100644 --- a/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c +++ b/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/scan-manager.h> +#include <mach/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c b/arch/arm/boards/ebv-socrates/lowlevel.c index ea4e1d746a..9643269f8e 100644 --- a/arch/arm/boards/ebv-socrates/lowlevel.c +++ b/arch/arm/boards/ebv-socrates/lowlevel.c @@ -7,13 +7,13 @@ #include <mach/generic.h> #include <debug_ll.h> #include "sdram_config.h" -#include <mach/sdram_config.h> +#include <mach/cyclone5-sdram-config.h> #include "pinmux_config.c" #include "pll_config.h" #include <mach/pll_config.h> #include "sequencer_defines.h" #include "sequencer_auto.h" -#include <mach/sequencer.c> +#include <mach/cyclone5-sequencer.c> #include "sequencer_auto_inst_init.c" #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c index 919bfc8c54..8e69319d17 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/board.c +++ b/arch/arm/boards/terasic-de0-nano-soc/board.c @@ -8,7 +8,7 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> static int phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c index 4e9ac7fb77..d5098055ff 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c +++ b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/scan-manager.h> +#include <mach/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c index 6d937abda5..1d5ea6b12a 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c +++ b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c @@ -7,13 +7,13 @@ #include <debug_ll.h> #include <asm/cache.h> #include "sdram_config.h" -#include <mach/sdram_config.h> +#include <mach/cyclone5-sdram-config.h> #include "pinmux_config.c" #include "pll_config.h" #include <mach/pll_config.h> #include "sequencer_defines.h" #include "sequencer_auto.h" -#include <mach/sequencer.c> +#include <mach/cyclone5-sequencer.c> #include "sequencer_auto_inst_init.c" #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" diff --git a/arch/arm/boards/terasic-sockit/board.c b/arch/arm/boards/terasic-sockit/board.c index 53cd36834f..ec68315998 100644 --- a/arch/arm/boards/terasic-sockit/board.c +++ b/arch/arm/boards/terasic-sockit/board.c @@ -8,7 +8,6 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/socfpga-regs.h> static int phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c b/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c index 117d7f4ebc..9367b0d110 100644 --- a/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c +++ b/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/scan-manager.h> +#include <mach/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/terasic-sockit/lowlevel.c b/arch/arm/boards/terasic-sockit/lowlevel.c index 8012783df3..0a6eb21365 100644 --- a/arch/arm/boards/terasic-sockit/lowlevel.c +++ b/arch/arm/boards/terasic-sockit/lowlevel.c @@ -7,13 +7,13 @@ #include <debug_ll.h> #include <asm/cache.h> #include "sdram_config.h" -#include <mach/sdram_config.h> +#include <mach/cyclone5-sdram-config.h> #include "pinmux_config.c" #include "pll_config.h" #include <mach/pll_config.h> #include "sequencer_defines.h" #include "sequencer_auto.h" -#include <mach/sequencer.c> +#include <mach/cyclone5-sequencer.c> #include "sequencer_auto_inst_init.c" #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index dea0e075d1..30b796dd3b 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -1,4 +1,4 @@ -obj-y += generic.o nic301.o bootsource.o reset-manager.o -pbl-y += init.o freeze-controller.o scan-manager.o system-manager.o -pbl-y += clock-manager.o +pbl-y += cyclone5-init.o cyclone5-freeze-controller.o cyclone5-scan-manager.o cyclone5-system-manager.o +pbl-y += cyclone5-clock-manager.o +obj-y += cyclone5-generic.o nic301.o cyclone5-bootsource.o cyclone5-reset-manager.o obj-$(CONFIG_ARCH_SOCFPGA_XLOAD) += xload.o diff --git a/arch/arm/mach-socfpga/bootsource.c b/arch/arm/mach-socfpga/cyclone5-bootsource.c index 739f0b5c0e..da4102c4f5 100644 --- a/arch/arm/mach-socfpga/bootsource.c +++ b/arch/arm/mach-socfpga/cyclone5-bootsource.c @@ -16,17 +16,17 @@ #include <environment.h> #include <init.h> #include <io.h> -#include <mach/socfpga-regs.h> -#include <mach/system-manager.h> +#include <mach/cyclone5-system-manager.h> +#include <mach/cyclone5-regs.h> -#define SYSMGR_BOOTINFO 0x14 +#define CYCLONE5_SYSMGR_BOOTINFO 0x14 -static int socfpga_boot_save_loc(void) +static int cyclone5_boot_save_loc(void) { enum bootsource src = BOOTSOURCE_UNKNOWN; uint32_t val; - val = readl(CYCLONE5_SYSMGR_ADDRESS + SYSMGR_BOOTINFO); + val = readl(CYCLONE5_SYSMGR_ADDRESS + CYCLONE5_SYSMGR_BOOTINFO); switch (val & 0x7) { case 0: @@ -54,4 +54,4 @@ static int socfpga_boot_save_loc(void) return 0; } -core_initcall(socfpga_boot_save_loc); +core_initcall(cyclone5_boot_save_loc); diff --git a/arch/arm/mach-socfpga/clock-manager.c b/arch/arm/mach-socfpga/cyclone5-clock-manager.c index f17371365f..79c8b6bf28 100644 --- a/arch/arm/mach-socfpga/clock-manager.c +++ b/arch/arm/mach-socfpga/cyclone5-clock-manager.c @@ -17,8 +17,8 @@ #include <common.h> #include <io.h> -#include <mach/clock-manager.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-clock-manager.h> +#include <mach/cyclone5-regs.h> #include <mach/generic.h> static inline void cm_wait_for_lock(void __iomem *cm, uint32_t mask) diff --git a/arch/arm/mach-socfpga/freeze-controller.c b/arch/arm/mach-socfpga/cyclone5-freeze-controller.c index 570bdeb735..87160161b0 100644 --- a/arch/arm/mach-socfpga/freeze-controller.c +++ b/arch/arm/mach-socfpga/cyclone5-freeze-controller.c @@ -18,7 +18,7 @@ #include <common.h> #include <io.h> #include <mach/generic.h> -#include <mach/freeze-controller.h> +#include <mach/cyclone5-freeze-controller.h> #define SYSMGR_FRZCTRL_LOOP_PARAM (1000) #define SYSMGR_FRZCTRL_DELAY_LOOP_PARAM (10) diff --git a/arch/arm/mach-socfpga/cyclone5-generic.c b/arch/arm/mach-socfpga/cyclone5-generic.c new file mode 100644 index 0000000000..3f49a9a542 --- /dev/null +++ b/arch/arm/mach-socfpga/cyclone5-generic.c @@ -0,0 +1,210 @@ +#include <common.h> +#include <malloc.h> +#include <envfs.h> +#include <init.h> +#include <io.h> +#include <fs.h> +#include <mci.h> +#include <linux/clkdev.h> +#include <linux/clk.h> +#include <linux/stat.h> +#include <linux/sizes.h> +#include <asm/memory.h> +#include <mach/cyclone5-system-manager.h> +#include <mach/cyclone5-reset-manager.h> +#include <mach/cyclone5-regs.h> +#include <mach/generic.h> +#include <mach/nic301.h> +#include <platform_data/dw_mmc.h> +#include <platform_data/serial-ns16550.h> +#include <platform_data/cadence_qspi.h> + +#define SYSMGR_SDMMCGRP_CTRL_REG (CYCLONE5_SYSMGR_ADDRESS + 0x108) +#define SYSMGR_SDMMC_CTRL_SMPLSEL(smplsel) (((smplsel) & 0x7) << 3) +#define SYSMGR_SDMMC_CTRL_DRVSEL(drvsel) ((drvsel) & 0x7) + +enum socfpga_clks { + timer, mmc, qspi_clk, uart, clk_max +}; + +static struct clk *clks[clk_max]; + +#if defined(CONFIG_MCI_DW) +static struct dw_mmc_platform_data mmc_pdata = { + .bus_width_caps = MMC_CAP_4_BIT_DATA, + .ciu_div = 3, +}; + +void socfpga_cyclone5_mmc_init(void) +{ + clks[mmc] = clk_fixed("mmc", 400000000); + clkdev_add_physbase(clks[mmc], CYCLONE5_SDMMC_ADDRESS, NULL); + add_generic_device("dw_mmc", 0, NULL, CYCLONE5_SDMMC_ADDRESS, SZ_4K, + IORESOURCE_MEM, &mmc_pdata); +} +#else +void socfpga_cyclone5_mmc_init(void) +{ + pr_debug("%s: MMC support not compiled in!\n", __func__); + + return; +} +#endif + +#if defined(CONFIG_SPI_CADENCE_QUADSPI) +static struct cadence_qspi_platform_data qspi_pdata = { + .ext_decoder = 0, + .fifo_depth = 128, +}; + +static void add_cadence_qspi_device(int id, resource_size_t ctrl, + resource_size_t data, void *pdata) +{ + struct device_d *dev; + struct resource *res; + + res = xzalloc(sizeof(struct resource) * 2); + res[0].start = ctrl; + res[0].end = ctrl + 0x100 - 1; + res[0].flags = IORESOURCE_MEM; + res[1].start = data; + res[1].end = data + 0x100 - 1; + res[1].flags = IORESOURCE_MEM; + + dev = add_generic_device_res("cadence_qspi", id, res, 2, pdata); + + dev_dbg(dev, "added resource\n"); +} + +void socfpga_cyclone5_qspi_init(void) +{ + clks[qspi_clk] = clk_fixed("qspi_clk", 370000000); + clkdev_add_physbase(clks[qspi_clk], CYCLONE5_QSPI_CTRL_ADDRESS, NULL); + clkdev_add_physbase(clks[qspi_clk], CYCLONE5_QSPI_DATA_ADDRESS, NULL); + add_cadence_qspi_device(0, CYCLONE5_QSPI_CTRL_ADDRESS, + CYCLONE5_QSPI_DATA_ADDRESS, &qspi_pdata); +} +#else +void socfpga_cyclone5_qspi_init(void) +{ + pr_debug("%s: QSPI support not compiled in!\n", __func__); + + return; +} +#endif + +static struct NS16550_plat uart_pdata = { + .clock = 100000000, + .shift = 2, +}; + +void socfpga_cyclone5_uart_init(void) +{ + struct device_d *dev; + + clks[uart] = clk_fixed("uart", 100000000); + clkdev_add_physbase(clks[uart], CYCLONE5_UART0_ADDRESS, NULL); + clkdev_add_physbase(clks[uart], CYCLONE5_UART1_ADDRESS, NULL); + dev = add_ns16550_device(0, 0xffc02000, 1024, IORESOURCE_MEM | + IORESOURCE_MEM_8BIT, &uart_pdata); + + dev_dbg(dev, "initialized\n"); +} + +void socfpga_cyclone5_timer_init(void) +{ + struct device_d *dev; + + clks[timer] = clk_fixed("timer", 200000000); + clkdev_add_physbase(clks[timer], CYCLONE5_SMP_TWD_ADDRESS, NULL); + dev = add_generic_device("smp_twd", 0, NULL, CYCLONE5_SMP_TWD_ADDRESS, 0x100, + IORESOURCE_MEM, NULL); + + dev_dbg(dev, "added smp_twd\n"); +} + +static int socfpga_detect_sdram(void) +{ + void __iomem *base = (void *)CYCLONE5_SDR_ADDRESS; + uint32_t dramaddrw, ctrlwidth, memsize; + int colbits, rowbits, bankbits; + int width_bytes; + + dramaddrw = readl(base + 0x5000 + 0x2c); + + colbits = dramaddrw & 0x1f; + rowbits = (dramaddrw >> 5) & 0x1f; + bankbits = (dramaddrw >> 10) & 0x7; + + ctrlwidth = readl(base + 0x5000 + 0x60); + + switch (ctrlwidth & 0x3) { + default: + case 0: + width_bytes = 1; + break; + case 1: + width_bytes = 2; + break; + case 2: + width_bytes = 4; + break; + } + + memsize = (1 << colbits) * (1 << rowbits) * (1 << bankbits) * width_bytes; + + pr_debug("%s: colbits: %d rowbits: %d bankbits: %d width: %d => memsize: 0x%08x\n", + __func__, colbits, rowbits, bankbits, width_bytes, memsize); + + arm_add_mem_device("ram0", 0x0, memsize); + + return 0; +} + +/* Some initialization for the EMAC */ +static void socfpga_init_emac(void) +{ + uint32_t rst, val; + + /* No need for this without network support, e.g. xloader build */ + if (!IS_ENABLED(CONFIG_NET)) + return; + + /* According to Cyclone V datasheet, 17-60 "EMAC HPS Interface + * Initialization", changing PHYSEL should be done with EMAC in reset + * via permodrst. */ + + /* Everything, except L4WD0/1, is out of reset via socfpga_lowlevel_init() */ + rst = readl(CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS); + rst |= RSTMGR_PERMODRST_EMAC0 | RSTMGR_PERMODRST_EMAC1; + writel(rst, CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS); + + /* Set emac0/1 PHY interface select to RGMII. We could read phy-mode + * from the device tree, if it was desired to support interfaces other + * than RGMII. */ + val = readl(CONFIG_SYSMGR_EMAC_CTRL); + val &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB); + val &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB); + val |= SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII << SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB; + val |= SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII << SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB; + writel(val, CONFIG_SYSMGR_EMAC_CTRL); + + /* Take emac0 and emac1 out of reset */ + rst &= ~(RSTMGR_PERMODRST_EMAC0 | RSTMGR_PERMODRST_EMAC1); + writel(rst, CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS); +} + +static int socfpga_init(void) +{ + socfpga_init_emac(); + + writel(SYSMGR_SDMMC_CTRL_DRVSEL(3) | SYSMGR_SDMMC_CTRL_SMPLSEL(0), + SYSMGR_SDMMCGRP_CTRL_REG); + + nic301_slave_ns(); + + socfpga_detect_sdram(); + + return 0; +} +core_initcall(socfpga_init); diff --git a/arch/arm/mach-socfpga/init.c b/arch/arm/mach-socfpga/cyclone5-init.c index 0c679e3d2d..412808b841 100644 --- a/arch/arm/mach-socfpga/init.c +++ b/arch/arm/mach-socfpga/cyclone5-init.c @@ -2,11 +2,11 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/freeze-controller.h> -#include <mach/system-manager.h> -#include <mach/clock-manager.h> -#include <mach/reset-manager.h> -#include <mach/scan-manager.h> +#include <mach/cyclone5-freeze-controller.h> +#include <mach/cyclone5-system-manager.h> +#include <mach/cyclone5-clock-manager.h> +#include <mach/cyclone5-reset-manager.h> +#include <mach/cyclone5-scan-manager.h> #include <mach/generic.h> void socfpga_lowlevel_init(struct socfpga_cm_config *cm_config, diff --git a/arch/arm/mach-socfpga/reset-manager.c b/arch/arm/mach-socfpga/cyclone5-reset-manager.c index 04522da4d1..4bbe1a8101 100644 --- a/arch/arm/mach-socfpga/reset-manager.c +++ b/arch/arm/mach-socfpga/cyclone5-reset-manager.c @@ -19,8 +19,8 @@ #include <io.h> #include <init.h> #include <restart.h> -#include <mach/socfpga-regs.h> -#include <mach/reset-manager.h> +#include <mach/cyclone5-regs.h> +#include <mach/cyclone5-reset-manager.h> /* Disable the watchdog (toggle reset to watchdog) */ void watchdog_disable(void) diff --git a/arch/arm/mach-socfpga/scan-manager.c b/arch/arm/mach-socfpga/cyclone5-scan-manager.c index 57979b90a2..cf076c3885 100644 --- a/arch/arm/mach-socfpga/scan-manager.c +++ b/arch/arm/mach-socfpga/cyclone5-scan-manager.c @@ -17,8 +17,8 @@ #include <common.h> #include <io.h> -#include <mach/freeze-controller.h> -#include <mach/scan-manager.h> +#include <mach/cyclone5-freeze-controller.h> +#include <mach/cyclone5-scan-manager.h> /* * @fn scan_mgr_io_scan_chain_engine_is_idle diff --git a/arch/arm/mach-socfpga/system-manager.c b/arch/arm/mach-socfpga/cyclone5-system-manager.c index 45db921f1a..7e86692c39 100644 --- a/arch/arm/mach-socfpga/system-manager.c +++ b/arch/arm/mach-socfpga/cyclone5-system-manager.c @@ -17,8 +17,8 @@ #include <common.h> #include <io.h> -#include <mach/system-manager.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-system-manager.h> +#include <mach/cyclone5-regs.h> void socfpga_sysmgr_pinmux_init(unsigned long *sys_mgr_init_table, int num) { diff --git a/arch/arm/mach-socfpga/include/mach/clock-manager.h b/arch/arm/mach-socfpga/include/mach/cyclone5-clock-manager.h index 45800de79a..797aa5d3cf 100644 --- a/arch/arm/mach-socfpga/include/mach/clock-manager.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-clock-manager.h @@ -15,8 +15,8 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#ifndef _CLOCK_MANAGER_H_ -#define _CLOCK_MANAGER_H_ +#ifndef _CLOCK_MANAGER_CYCLONE5_H_ +#define _CLOCK_MANAGER_CYCLONE5_H_ struct socfpga_cm_config { /* main group */ @@ -197,4 +197,4 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg); CLKMGR_MAINPLLGRP_VCO_EN_SET(0)| \ CLKMGR_MAINPLLGRP_VCO_BGPWRDN_SET(0)) -#endif /* _CLOCK_MANAGER_H_ */ +#endif diff --git a/arch/arm/mach-socfpga/include/mach/freeze-controller.h b/arch/arm/mach-socfpga/include/mach/cyclone5-freeze-controller.h index 4253f5b38f..93ce5152ed 100644 --- a/arch/arm/mach-socfpga/include/mach/freeze-controller.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-freeze-controller.h @@ -15,10 +15,10 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#ifndef _FREEZE_CONTROLLER_H_ -#define _FREEZE_CONTROLLER_H_ +#ifndef _CYCLONE5_FREEZE_CONTROLLER_H_ +#define _CYCLONE5_FREEZE_CONTROLLER_H_ -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> #define SYSMGR_FRZCTRL_ADDRESS 0x40 #define SYSMGR_FRZCTRL_VIOCTRL_ADDRESS 0x40 diff --git a/arch/arm/mach-socfpga/include/mach/socfpga-regs.h b/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h index e88daf7189..e88daf7189 100644 --- a/arch/arm/mach-socfpga/include/mach/socfpga-regs.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h diff --git a/arch/arm/mach-socfpga/include/mach/reset-manager.h b/arch/arm/mach-socfpga/include/mach/cyclone5-reset-manager.h index 899401ce3c..899401ce3c 100644 --- a/arch/arm/mach-socfpga/include/mach/reset-manager.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-reset-manager.h diff --git a/arch/arm/mach-socfpga/include/mach/scan-manager.h b/arch/arm/mach-socfpga/include/mach/cyclone5-scan-manager.h index 568bedfde1..df720a7e08 100644 --- a/arch/arm/mach-socfpga/include/mach/scan-manager.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-scan-manager.h @@ -19,7 +19,7 @@ #define _SCAN_MANAGER_H_ #include <io.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> /*********************************************************** * * diff --git a/arch/arm/mach-socfpga/include/mach/sdram_config.h b/arch/arm/mach-socfpga/include/mach/cyclone5-sdram-config.h index 2af797a920..a19a837994 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_config.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-sdram-config.h @@ -1,9 +1,9 @@ #ifndef __MACH_SDRAM_CONFIG_H #define __MACH_SDRAM_CONFIG_H -#include <mach/sdram.h> -#include <mach/socfpga-regs.h> -#include <mach/system-manager.h> +#include <mach/cyclone5-sdram.h> +#include <mach/cyclone5-regs.h> +#include <mach/cyclone5-system-manager.h> static inline void sdram_write(unsigned register_offset, unsigned val) { diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/cyclone5-sdram.h index ebd331e83e..ebd331e83e 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-sdram.h diff --git a/arch/arm/mach-socfpga/include/mach/sequencer.c b/arch/arm/mach-socfpga/include/mach/cyclone5-sequencer.c index d2338e6406..e5ecb0f1b8 100644 --- a/arch/arm/mach-socfpga/include/mach/sequencer.c +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-sequencer.c @@ -26,11 +26,9 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "sequencer_defines.h" - #include "system.h" #include "sdram_io.h" -#include "sequencer.h" +#include "cyclone5-sequencer.h" #include "tclrpt.h" /****************************************************************************** @@ -57,7 +55,7 @@ asm(".global __alt_stack_pointer"); asm("__alt_stack_pointer = " STRINGIFY(STACK_POINTER)); #endif -#include <mach/sdram.h> +#include <mach/cyclone5-sdram.h> #define NEWVERSION_RDDESKEW 1 #define NEWVERSION_WRDESKEW 1 diff --git a/arch/arm/mach-socfpga/include/mach/sequencer.h b/arch/arm/mach-socfpga/include/mach/cyclone5-sequencer.h index dd0378af34..dd0378af34 100644 --- a/arch/arm/mach-socfpga/include/mach/sequencer.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-sequencer.h diff --git a/arch/arm/mach-socfpga/include/mach/system-manager.h b/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h index 9efc37a4dc..9efc37a4dc 100644 --- a/arch/arm/mach-socfpga/include/mach/system-manager.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h diff --git a/arch/arm/mach-socfpga/include/mach/pll_config.h b/arch/arm/mach-socfpga/include/mach/pll_config.h index bb491d82f1..1a7e851eda 100644 --- a/arch/arm/mach-socfpga/include/mach/pll_config.h +++ b/arch/arm/mach-socfpga/include/mach/pll_config.h @@ -1,5 +1,5 @@ -#include <mach/clock-manager.h> +#include <mach/cyclone5-clock-manager.h> static struct socfpga_cm_config cm_default_cfg = { /* main group */ diff --git a/arch/arm/mach-socfpga/include/mach/sdram_io.h b/arch/arm/mach-socfpga/include/mach/sdram_io.h index 62698000f6..ef87bdaf63 100755..100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_io.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_io.h @@ -26,7 +26,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/sdram.h> +#include <mach/cyclone5-sdram.h> #define MGR_SELECT_MASK 0xf8000 diff --git a/arch/arm/mach-socfpga/include/mach/sequencer_defines.h b/arch/arm/mach-socfpga/include/mach/sequencer_defines.h deleted file mode 100644 index 5059844106..0000000000 --- a/arch/arm/mach-socfpga/include/mach/sequencer_defines.h +++ /dev/null @@ -1,6 +0,0 @@ -#define TINIT_CNTR1_VAL 32 -#define TINIT_CNTR2_VAL 32 -#define TINIT_CNTR0_VAL 99 -#define TRESET_CNTR1_VAL 99 -#define TRESET_CNTR2_VAL 10 -#define TRESET_CNTR0_VAL 99 diff --git a/arch/arm/mach-socfpga/include/mach/system.h b/arch/arm/mach-socfpga/include/mach/system.h index 89527b2c2b..89527b2c2b 100755..100644 --- a/arch/arm/mach-socfpga/include/mach/system.h +++ b/arch/arm/mach-socfpga/include/mach/system.h diff --git a/arch/arm/mach-socfpga/include/mach/tclrpt.h b/arch/arm/mach-socfpga/include/mach/tclrpt.h index 4345b23ba6..6b332c8754 100755..100644 --- a/arch/arm/mach-socfpga/include/mach/tclrpt.h +++ b/arch/arm/mach-socfpga/include/mach/tclrpt.h @@ -28,7 +28,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "sequencer.h" +#include "cyclone5-sequencer.h" #define TCLRPT_SET(item, value) diff --git a/arch/arm/mach-socfpga/nic301.c b/arch/arm/mach-socfpga/nic301.c index 206dd48ff9..7069c6e5b9 100644 --- a/arch/arm/mach-socfpga/nic301.c +++ b/arch/arm/mach-socfpga/nic301.c @@ -18,7 +18,7 @@ #include <common.h> #include <io.h> #include <mach/nic301.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-regs.h> /* * Convert all slave from secure to non secure diff --git a/arch/arm/mach-socfpga/xload.c b/arch/arm/mach-socfpga/xload.c index d24944bbb8..5d47bb9d3e 100644 --- a/arch/arm/mach-socfpga/xload.c +++ b/arch/arm/mach-socfpga/xload.c @@ -17,8 +17,8 @@ #include <linux/clk.h> #include <mach/generic.h> -#include <mach/system-manager.h> -#include <mach/socfpga-regs.h> +#include <mach/cyclone5-system-manager.h> +#include <mach/cyclone5-regs.h> static struct socfpga_barebox_part default_parts[] = { { |