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authorSascha Hauer <s.hauer@pengutronix.de>2022-04-21 11:16:09 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-04-21 11:16:09 +0200
commit7a942b81e4d10b4f729c19b09b5d330bfeb6ba0e (patch)
treefa2880223841cf5a62bb0bab594300d5f0b936b5 /arch/arm
parent0448e40567f182e8cb9b2ddef81cdf1de29cfdb4 (diff)
parentf1a8301c8052905b9b62fa7e9df13662abc834cb (diff)
downloadbarebox-7a942b81e4d10b4f729c19b09b5d330bfeb6ba0e.tar.gz
barebox-7a942b81e4d10b4f729c19b09b5d330bfeb6ba0e.tar.xz
Merge branch 'for-next/imx'
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boards/ccxmx51/ccxmx51.c2
-rw-r--r--arch/arm/boards/ccxmx51/flash-header-x16.imxcfg61
-rw-r--r--arch/arm/boards/ccxmx51/flash-header-x32.imxcfg (renamed from arch/arm/boards/ccxmx51/flash-header.imxcfg)1
-rw-r--r--arch/arm/boards/ccxmx51/lowlevel.c40
-rw-r--r--arch/arm/boards/protonic-imx6/board.c68
-rw-r--r--arch/arm/boards/webasto-ccbv2/board.c6
-rw-r--r--arch/arm/boards/webasto-ccbv2/lowlevel.c26
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/imx6qdl-phytec-pbab01.dtsi4
-rw-r--r--arch/arm/dts/imx6ul-webasto-marvel.dts586
10 files changed, 772 insertions, 23 deletions
diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c
index dfc26cd835..cbf06e6cd6 100644
--- a/arch/arm/boards/ccxmx51/ccxmx51.c
+++ b/arch/arm/boards/ccxmx51/ccxmx51.c
@@ -245,8 +245,6 @@ static __init int ccxmx51_init(void)
hang();
}
- ccxmx_id = &ccxmx51_ids[hwid[0]];
-
switch (hwid[2] & 0xc0) {
case 0x00:
manloc = 'B';
diff --git a/arch/arm/boards/ccxmx51/flash-header-x16.imxcfg b/arch/arm/boards/ccxmx51/flash-header-x16.imxcfg
new file mode 100644
index 0000000000..6d77324fc8
--- /dev/null
+++ b/arch/arm/boards/ccxmx51/flash-header-x16.imxcfg
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+soc imx51
+loadaddr 0x90000000
+ivtofs 0x400
+wm 32 0x73fa88a0 0x00000200
+wm 32 0x73fa850c 0x000020c5
+wm 32 0x73fa8510 0x000020c5
+wm 32 0x73fa883c 0x00000002
+wm 32 0x73fa8848 0x00000002
+wm 32 0x73fa84b8 0x000000e7
+wm 32 0x73fa84bc 0x00000045
+wm 32 0x73fa84c0 0x00000045
+wm 32 0x73fa84c4 0x00000045
+wm 32 0x73fa84c8 0x00000045
+wm 32 0x73fa8820 0x00000000
+wm 32 0x73fa84a4 0x00000003
+wm 32 0x73fa84a8 0x00000003
+wm 32 0x73fa84ac 0x000000e3
+wm 32 0x73fa84b0 0x000000e3
+wm 32 0x73fa84b4 0x000000e3
+wm 32 0x73fa84cc 0x000000e3
+wm 32 0x73fa84d0 0x000000e2
+wm 32 0x73fa882c 0x00000004
+wm 32 0x73fa88a4 0x00000004
+wm 32 0x73fa88ac 0x00000004
+wm 32 0x73fa88b8 0x00000004
+wm 32 0x83fd9000 0x82a10000
+wm 32 0x83fd9008 0x82a10000
+wm 32 0x83fd9010 0x000ad0d0
+wm 32 0x83fd9004 0x3f3584ab
+wm 32 0x83fd900c 0x3f3584ab
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x0000801a
+wm 32 0x83fd9014 0x0000801b
+wm 32 0x83fd9014 0x00448019
+wm 32 0x83fd9014 0x07328018
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x06328018
+wm 32 0x83fd9014 0x03808019
+wm 32 0x83fd9014 0x00408019
+wm 32 0x83fd9014 0x00008000
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x0000801e
+wm 32 0x83fd9014 0x0000801f
+wm 32 0x83fd9014 0x0000801d
+wm 32 0x83fd9014 0x0732801c
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x0632801c
+wm 32 0x83fd9014 0x0380801d
+wm 32 0x83fd9014 0x0040801d
+wm 32 0x83fd9014 0x00008004
+wm 32 0x83fd9000 0xb2a10000
+wm 32 0x83fd9008 0xb2a10000
+wm 32 0x83fd9010 0x000ad6d0
+wm 32 0x83fd9034 0x90000000
+wm 32 0x83fd9014 0x00000000
diff --git a/arch/arm/boards/ccxmx51/flash-header.imxcfg b/arch/arm/boards/ccxmx51/flash-header-x32.imxcfg
index 185a48fe18..6480aa590e 100644
--- a/arch/arm/boards/ccxmx51/flash-header.imxcfg
+++ b/arch/arm/boards/ccxmx51/flash-header-x32.imxcfg
@@ -59,4 +59,3 @@ wm 32 0x83fd9008 0xb2a20000
wm 32 0x83fd9010 0x000ad6d0
wm 32 0x83fd9034 0x90000000
wm 32 0x83fd9014 0x00000000
-
diff --git a/arch/arm/boards/ccxmx51/lowlevel.c b/arch/arm/boards/ccxmx51/lowlevel.c
index adcb30a7ff..49bc7bfe32 100644
--- a/arch/arm/boards/ccxmx51/lowlevel.c
+++ b/arch/arm/boards/ccxmx51/lowlevel.c
@@ -2,22 +2,60 @@
/* Author: Alexander Shiyan <shc_work@mail.ru> */
#include <common.h>
+#include <debug_ll.h>
+#include <mach/clock-imx51_53.h>
#include <mach/esdctl.h>
#include <mach/generic.h>
+#include <mach/iomux-mx51.h>
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
#include <mach/imx51-regs.h>
-ENTRY_FUNCTION(start_ccxmx51, r0, r1, r2)
+static inline void setup_uart(void)
+{
+ void __iomem *iomuxbase = IOMEM(MX51_IOMUXC_BASE_ADDR);
+ void __iomem *ccmbase = IOMEM(MX51_CCM_BASE_ADDR);
+
+ /*
+ * Restore CCM values that might be changed by the Mask ROM
+ * code.
+ *
+ * Source: RealView debug scripts provided by Freescale
+ */
+ writel(MX5_CCM_CBCDR_RESET_VALUE, ccmbase + MX5_CCM_CBCDR);
+ writel(MX5_CCM_CSCMR1_RESET_VALUE, ccmbase + MX5_CCM_CSCMR1);
+ writel(MX5_CCM_CSCDR1_RESET_VALUE, ccmbase + MX5_CCM_CSCDR1);
+
+ imx_setup_pad(iomuxbase, MX51_PAD_UART1_TXD__UART1_TXD);
+
+ imx51_uart_setup_ll();
+
+ putc_ll('>');
+}
+
+static inline void start_ccxmx51(void)
{
extern char __dtb_imx51_ccxmx51_start[];
void *fdt;
imx5_cpu_lowlevel_init();
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ setup_uart();
+
arm_setup_stack(0x20000000);
fdt = __dtb_imx51_ccxmx51_start + get_runtime_offset();
barebox_arm_entry(MX51_CSD0_BASE_ADDR, SZ_128M, fdt);
}
+
+ENTRY_FUNCTION(start_ccxmx51_x16, r0, r1, r2)
+{
+ start_ccxmx51();
+}
+
+ENTRY_FUNCTION(start_ccxmx51_x32, r0, r1, r2)
+{
+ start_ccxmx51();
+}
diff --git a/arch/arm/boards/protonic-imx6/board.c b/arch/arm/boards/protonic-imx6/board.c
index adde1be8d9..52cf39917a 100644
--- a/arch/arm/boards/protonic-imx6/board.c
+++ b/arch/arm/boards/protonic-imx6/board.c
@@ -21,6 +21,7 @@
#include <sys/stat.h>
#include <unistd.h>
#include <usb/usb.h>
+#include <work.h>
#define GPIO_HW_REV_ID {\
{IMX_GPIO_NR(2, 8), GPIOF_DIR_IN | GPIOF_ACTIVE_LOW, "rev_id0"}, \
@@ -74,6 +75,7 @@ struct prt_machine_data {
unsigned int i2c_addr;
unsigned int i2c_adapter;
unsigned int emmc_usdhc;
+ unsigned int sd_usdhc;
unsigned int flags;
int (*init)(struct prt_imx6_priv *priv);
};
@@ -84,9 +86,10 @@ struct prt_imx6_priv {
unsigned int hw_id;
unsigned int hw_rev;
const char *name;
- struct poller_async poller;
unsigned int usb_delay;
unsigned int no_usb_check;
+ struct work_queue wq;
+ struct work_struct work;
};
struct prti6q_rfid_contents {
@@ -289,9 +292,9 @@ exit_usb_mount:
#define OTG_PORTSC1 (MX6_OTG_BASE_ADDR+0x184)
-static void prt_imx6_check_usb_boot(void *data)
+static void prt_imx6_check_usb_boot_do_work(struct work_struct *w)
{
- struct prt_imx6_priv *priv = data;
+ struct prt_imx6_priv *priv = container_of(w, struct prt_imx6_priv, work);
struct device_d *dev = priv->dev;
char *second_word, *bootsrc, *usbdisk;
char buf[sizeof("vicut1q recovery")] = {};
@@ -442,6 +445,16 @@ static int prt_imx6_bbu(struct prt_imx6_priv *priv)
if (ret)
goto exit_bbu;
+ devicefile = basprintf("mmc%d", dcfg->sd_usdhc);
+ if (!devicefile) {
+ ret = -ENOMEM;
+ goto exit_bbu;
+ }
+
+ ret = imx6_bbu_internal_mmc_register_handler("SD", devicefile, 0);
+ if (ret)
+ goto exit_bbu;
+
return 0;
exit_bbu:
dev_err(priv->dev, "Failed to register bbu: %pe\n", ERR_PTR(ret));
@@ -451,7 +464,6 @@ exit_bbu:
static int prt_imx6_devices_init(void)
{
struct prt_imx6_priv *priv = prt_priv;
- int ret;
if (!priv)
return 0;
@@ -466,14 +478,12 @@ static int prt_imx6_devices_init(void)
prt_imx6_env_init(priv);
if (!priv->no_usb_check) {
- ret = poller_async_register(&priv->poller, "usb-boot");
- if (ret) {
- dev_err(priv->dev, "can't setup poller\n");
- return ret;
- }
+ priv->wq.fn = prt_imx6_check_usb_boot_do_work;
- poller_call_async(&priv->poller, priv->usb_delay * SECOND,
- &prt_imx6_check_usb_boot, priv);
+ wq_register(&priv->wq);
+
+ wq_queue_delayed_work(&priv->wq, &priv->work,
+ priv->usb_delay * SECOND);
}
return 0;
@@ -643,6 +653,18 @@ static int prt_imx6_init_prtvt7(struct prt_imx6_priv *priv)
return 0;
}
+static int prt_imx6_init_prtwd3(struct prt_imx6_priv *priv)
+{
+ void __iomem *iomux = (void *)MX6_IOMUXC_BASE_ADDR;
+ uint32_t val;
+
+ val = readl(iomux + IOMUXC_GPR1);
+ val |= IMX6Q_GPR1_ENET_CLK_SEL_ANATOP;
+ writel(val, iomux + IOMUXC_GPR1);
+
+ return 0;
+}
+
static int prt_imx6_rfid_fixup(struct prt_imx6_priv *priv,
struct device_node *root)
{
@@ -850,6 +872,7 @@ static const struct prt_machine_data prt_imx6_cfg_alti6p[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_EMMC,
}, {
.hw_id = UINT_MAX
@@ -863,6 +886,7 @@ static const struct prt_machine_data prt_imx6_cfg_victgo[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_victgo,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -877,6 +901,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1[] = {
.i2c_addr = 0x50,
.i2c_adapter = 1,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = HW_TYPE_VICUT1,
@@ -884,6 +909,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_yaco,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -892,6 +918,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_new,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -906,6 +933,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1q[] = {
.i2c_addr = 0x50,
.i2c_adapter = 1,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = HW_TYPE_VICUT1,
@@ -913,6 +941,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1q[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_yaco,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -921,6 +950,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1q[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_yaco,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -929,6 +959,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicut1q[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_new,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -943,6 +974,7 @@ static const struct prt_machine_data prt_imx6_cfg_vicutp[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_kvg_new,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
@@ -957,6 +989,7 @@ static const struct prt_machine_data prt_imx6_cfg_lanmcu[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_EMMC | PRT_IMX6_BOOTCHOOSER,
}, {
.hw_id = UINT_MAX
@@ -970,6 +1003,7 @@ static const struct prt_machine_data prt_imx6_cfg_plybas[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR | PRT_IMX6_USB_LONG_DELAY,
}, {
.hw_id = UINT_MAX
@@ -983,6 +1017,7 @@ static const struct prt_machine_data prt_imx6_cfg_plym2m[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR | PRT_IMX6_USB_LONG_DELAY,
}, {
.hw_id = UINT_MAX
@@ -996,6 +1031,7 @@ static const struct prt_machine_data prt_imx6_cfg_prti6g[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 1,
+ .sd_usdhc = 0,
.init = prt_imx6_init_prti6g,
.flags = PRT_IMX6_BOOTSRC_EMMC | PRT_IMX6_BOOTCHOOSER,
}, {
@@ -1010,6 +1046,7 @@ static const struct prt_machine_data prt_imx6_cfg_prti6q[] = {
.i2c_addr = 0x51,
.i2c_adapter = 2,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = HW_TYPE_PRTI6Q,
@@ -1017,6 +1054,7 @@ static const struct prt_machine_data prt_imx6_cfg_prti6q[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = UINT_MAX
@@ -1030,6 +1068,7 @@ static const struct prt_machine_data prt_imx6_cfg_prtmvt[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = UINT_MAX
@@ -1043,6 +1082,7 @@ static const struct prt_machine_data prt_imx6_cfg_prtrvt[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_SPI_NOR,
}, {
.hw_id = UINT_MAX
@@ -1056,6 +1096,7 @@ static const struct prt_machine_data prt_imx6_cfg_prtvt7[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.init = prt_imx6_init_prtvt7,
.flags = PRT_IMX6_BOOTSRC_EMMC | PRT_IMX6_BOOTCHOOSER |
PRT_IMX6_USB_LONG_DELAY,
@@ -1071,6 +1112,7 @@ static const struct prt_machine_data prt_imx6_cfg_prtwd2[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
.flags = PRT_IMX6_BOOTSRC_EMMC,
}, {
.hw_id = UINT_MAX
@@ -1084,6 +1126,8 @@ static const struct prt_machine_data prt_imx6_cfg_prtwd3[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 2,
+ .sd_usdhc = 0,
+ .init = prt_imx6_init_prtwd3,
.flags = PRT_IMX6_BOOTSRC_EMMC,
}, {
.hw_id = UINT_MAX
@@ -1097,6 +1141,7 @@ static const struct prt_machine_data prt_imx6_cfg_jozacp[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 0,
+ .sd_usdhc = 2,
.flags = PRT_IMX6_BOOTSRC_EMMC | PRT_IMX6_BOOTCHOOSER,
}, {
.hw_id = HW_TYPE_JOZACPP,
@@ -1104,6 +1149,7 @@ static const struct prt_machine_data prt_imx6_cfg_jozacp[] = {
.i2c_addr = 0x51,
.i2c_adapter = 0,
.emmc_usdhc = 0,
+ .sd_usdhc = 2,
.flags = PRT_IMX6_BOOTSRC_EMMC | PRT_IMX6_BOOTCHOOSER,
}, {
.hw_id = UINT_MAX
diff --git a/arch/arm/boards/webasto-ccbv2/board.c b/arch/arm/boards/webasto-ccbv2/board.c
index 477771309e..fd6ea6f406 100644
--- a/arch/arm/boards/webasto-ccbv2/board.c
+++ b/arch/arm/boards/webasto-ccbv2/board.c
@@ -22,7 +22,10 @@ static int ccbv2_probe(struct device_d *dev)
imx6_bbu_internal_mmcboot_register_handler("emmc", "/dev/mmc1",
BBU_HANDLER_FLAG_DEFAULT);
- barebox_set_hostname("weabsto-ccbv2");
+ if (of_machine_is_compatible("webasto,imx6ul-marvel"))
+ barebox_set_hostname("webasto-marvel");
+ else
+ barebox_set_hostname("webasto-ccbv2");
if(!IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE))
return 0;
@@ -48,6 +51,7 @@ err:
static const struct of_device_id ccbv2_of_match[] = {
{ .compatible = "webasto,imx6ul-ccbv2" },
+ { .compatible = "webasto,imx6ul-marvel" },
{ /* sentinel */ },
};
diff --git a/arch/arm/boards/webasto-ccbv2/lowlevel.c b/arch/arm/boards/webasto-ccbv2/lowlevel.c
index 32117b0a77..2bf0c3636f 100644
--- a/arch/arm/boards/webasto-ccbv2/lowlevel.c
+++ b/arch/arm/boards/webasto-ccbv2/lowlevel.c
@@ -15,8 +15,6 @@
#include "ccbv2.h"
-extern char __dtb_z_imx6ul_webasto_ccbv2_start[];
-
static void configure_uart(void)
{
void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
@@ -32,7 +30,7 @@ static void configure_uart(void)
}
-static void noinline start_ccbv2(u32 r0)
+static void noinline start_ccbv2(u32 r0, unsigned long mem_size, char *fdt)
{
int tee_size;
void *tee;
@@ -48,7 +46,7 @@ static void noinline start_ccbv2(u32 r0)
*/
if(IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE)
&& !(r0 > MX6_MMDC_P0_BASE_ADDR
- && r0 < MX6_MMDC_P0_BASE_ADDR + SZ_512M)) {
+ && r0 < MX6_MMDC_P0_BASE_ADDR + mem_size)) {
get_builtin_firmware(ccbv2_optee_bin, &tee, &tee_size);
memset((void *)OPTEE_OVERLAY_LOCATION, 0, 0x1000);
@@ -56,9 +54,10 @@ static void noinline start_ccbv2(u32 r0)
start_optee_early(NULL, tee);
}
- imx6ul_barebox_entry(__dtb_z_imx6ul_webasto_ccbv2_start);
+ imx6ul_barebox_entry(fdt);
}
+extern char __dtb_z_imx6ul_webasto_ccbv2_start[];
ENTRY_FUNCTION(start_imx6ul_ccbv2_256m, r0, r1, r2)
{
@@ -70,12 +69,25 @@ ENTRY_FUNCTION(start_imx6ul_ccbv2_256m, r0, r1, r2)
setup_c();
barrier();
- start_ccbv2(r0);
+ start_ccbv2(r0, SZ_256M, __dtb_z_imx6ul_webasto_ccbv2_start);
}
ENTRY_FUNCTION(start_imx6ul_ccbv2_512m, r0, r1, r2)
{
+ imx6ul_cpu_lowlevel_init();
+ arm_setup_stack(0x00910000);
+
+ relocate_to_current_adr();
+ setup_c();
+ barrier();
+
+ start_ccbv2(r0, SZ_512M, __dtb_z_imx6ul_webasto_ccbv2_start);
+}
+
+extern char __dtb_z_imx6ul_webasto_marvel_start[];
+ENTRY_FUNCTION(start_imx6ul_marvel, r0, r1, r2)
+{
imx6ul_cpu_lowlevel_init();
arm_setup_stack(0x00910000);
@@ -84,5 +96,5 @@ ENTRY_FUNCTION(start_imx6ul_ccbv2_512m, r0, r1, r2)
setup_c();
barrier();
- start_ccbv2(r0);
+ start_ccbv2(r0, SZ_512M, __dtb_z_imx6ul_webasto_marvel_start);
}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 925ac12aa5..e0177d84e4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -160,6 +160,7 @@ lwl-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
lwl-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o
lwl-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-ccbv2.dtb.o
+lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-marvel.dtb.o
lwl-$(CONFIG_MACH_ZII_RDU1) += \
imx51-zii-rdu1.dtb.o \
imx51-zii-scu2-mezz.dtb.o \
diff --git a/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi
index 991c7e4fab..88db962535 100644
--- a/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi
@@ -15,6 +15,10 @@
status = "okay";
};
+&usbotg {
+ dr_mode = "otg";
+};
+
#ifdef USE_STATE_EXAMPLE
#include "state-example.dtsi"
#endif
diff --git a/arch/arm/dts/imx6ul-webasto-marvel.dts b/arch/arm/dts/imx6ul-webasto-marvel.dts
new file mode 100644
index 0000000000..b8ecb00c8c
--- /dev/null
+++ b/arch/arm/dts/imx6ul-webasto-marvel.dts
@@ -0,0 +1,586 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2019, Webasto SE
+ * Author: Johannes Eigner <johannes.eigner@webasto.com>
+ *
+ * Description of the Marvel B2, MK3 Comboard
+ */
+
+/dts-v1/;
+
+#include <arm/imx6ul.dtsi>
+
+/ {
+ model = "Webasto common communication board Marvel MK3";
+ compatible = "webasto,imx6ul-marvel-b2", "webasto,imx6ul-marvel", "fsl,imx6ul";
+
+ chosen {
+ stdout-path = &uart7;
+ environment {
+ compatible = "barebox,environment";
+ device-path = &environment_emmc;
+ };
+ };
+
+ aliases {
+ state = &state_emmc;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dt-overlay@84000000 {
+ reg = <0x84000000 0x100000>;
+ no-map;
+ };
+ };
+
+ state_emmc: state {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "barebox,state";
+ magic = <0x290cf8c6>;
+ backend-type = "raw";
+ backend = <&backend_state_emmc>;
+ backend-stridesize = <0x200>;
+
+ bootstate {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ system0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@0 {
+ reg = <0x0 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@4 {
+ reg = <0x4 0x4>;
+ type = "uint32";
+ default = <20>;
+ };
+ };
+
+ system1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@8 {
+ reg = <0x8 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@c {
+ reg = <0xc 0x4>;
+ type = "uint32";
+ default = <21>;
+ };
+ };
+
+ last_chosen@10 {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ };
+ };
+ };
+
+ transceiver1_en: regulator-can1phy {
+ compatible = "regulator-fixed";
+ regulator-name = "can-transceiver1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctl_can1phy>;
+ vin-supply = <&swbst_reg>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_4v: regulator-4v {
+ compatible = "regulator-fixed";
+ regulator-name = "V_+4V";
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <4000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_wl18xx_vmmc: regulator-wl18xx {
+ compatible = "regulator-fixed";
+ regulator-name = "wl1837";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_reg>;
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ reg_dp83822_en: regulator-dp83822 {
+ compatible = "regulator-fixed";
+ regulator-name = "dp83822";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_phy_reg>;
+ vin-supply = <&vcc_eth>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&asrc {
+ status = "disabled";
+};
+
+&can1 {
+ xceiver-supply = <&transceiver1_en>; /* CAN side */
+ vdd-supply = <&vgen1_reg>; /* I/O side */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctl_can1>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-supply = <&reg_dp83822_en>;
+ phy-handle = <&dp83822i>;
+ phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dp83822i: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ pmic: mc34pf3000@8 {
+ compatible = "fsl,pfuze3000";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctl_pmic_irq>;
+ interrupts-extended = <&gpio1 29 IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x08>;
+ regulators {
+ sw1a_reg: sw1a {
+ regulator-name = "V_+3V3_SW1A";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <6250>;
+ };
+ vdd_soc_in: sw1b {
+ regulator-name = "V_+1V4_SW1B";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1475000>;
+ regulator-ramp-delay = <6250>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ sw2_reg: sw2 {
+ regulator-name = "V_+3V3_SW2";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vcc_ddr3: sw3 {
+ regulator-name = "V_+1V35_SW3";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ swbst_reg: swbst {
+ regulator-name = "V_+5V0_SWBST";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5150000>;
+ regulator-boot-on;
+ regulator-always-on; /* due to hardware requirements */
+ };
+ vdd_snvs: vsnvs {
+ regulator-name = "V_+3V0_SNVS";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vrefddr: vrefddr {
+ regulator-name = "V_+0V675_VREFDDR";
+ vin-supply = <&vcc_ddr3>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ /* 3V3 Supply: i.MX6 modules */
+ vgen1_reg: vldo1 {
+ regulator-name = "V_+3V3_LDO1";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vgen2_reg: vldo2 {
+ /* not connected */
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
+ };
+ vgen3_reg: vccsd {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ vdd_high_in: v33 {
+ regulator-name = "V_+3V3_V33";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vcc_eth: vldo3 {
+ regulator-name = "V_+1V8_LDO3";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vgen6_reg: vldo4 {
+ regulator-name = "V_+1V8_LDO4";
+ vin-supply = <&reg_4v>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_phy_reg: phyreggrp {
+ fsl,pins = <
+ /* high = phy enabled */
+ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x13030
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ /* Note: 1.8 V */
+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x13030
+ >;
+ };
+
+ pinctl_pmic_irq: pmicgrp {
+ fsl,pins = <
+ /* 1.8 V level */
+ MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x10000
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ /* 1.8 V level for all */
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_uart6: uart6grp {
+ fsl,pins = <
+ /* 1.8 V level for all */
+ MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b0
+ MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b0
+ MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS 0x1b0b0
+ MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x10030
+ >;
+ };
+
+ pinctrl_uart7: uart7grp {
+ fsl,pins = <
+ /* 3.3 V level for all */
+ MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x0b0b0
+ MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b0
+ >;
+ };
+
+ pinctrl_wifi_reg: wifigrp {
+ fsl,pins = <
+ /* 1.8 V level for all */
+ MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x10030
+ MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x00010
+ >;
+ };
+
+ pinctrl_wifi_irq: wifiirqgrp {
+ fsl,pins = <
+ /* 1.8 V level */
+ MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x17000
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ /* 1.8 V level for all */
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x10059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x10059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x10059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x10059
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp_slow {
+ fsl,pins = <
+ /* 3.3 V level for all, *no* external PU */
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10079
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17029
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17029
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17029
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17029
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17029
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17029
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17029
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17029
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17029
+ MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x00008
+ >;
+ };
+
+ pinctrl_usdhc2_100MHZ: usdhc2grp_100m {
+ fsl,pins = <
+ /* 3.3 V level for all, *no* external PU */
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100e9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x1b0a9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x1b0a9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x1b0a9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x1b0a9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x1b0a9
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x1b0a9
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x1b0a9
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x1b0a9
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x1b0a9
+ MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x00008
+ >;
+ };
+
+ pinctrl_usdhc2_200MHZ: usdhc2grp_200m {
+ fsl,pins = <
+ /* 3.3 V level for all, *no* external PU */
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100e9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x1b0e9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x1b0e9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x1b0e9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x1b0e9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x1b0e9
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x1b0e9
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x1b0e9
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x1b0e9
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x1b0e9
+ MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x00008
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x00b0
+ >;
+ };
+
+ pinctl_can1phy: can1phygrp {
+ fsl,pins = <
+ /* 3.3 V level */
+ MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x00008
+ >;
+ };
+
+ pinctl_can1: can1grp {
+ fsl,pins = <
+ /* 3.3 V level for all */
+ MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x00009
+ MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x17000
+ >;
+ };
+
+ pinctrl_usbotg2: cmgrp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x10800 /* shutdown signal from voltage monitor */
+ MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x00028 /* power on signal to modem */
+ MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x00028 /* fast shutdown signal to modem */
+ MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x00028 /* emergency reset signal to modem */
+ MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x14000 /* status signal from modem */
+ >;
+ };
+};
+
+&gpio1 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "PWRON_CM_UC_DO", "FST_SHDN_CM_UC_DO", "", "INT_VMON_OUT",
+ "", "STATUS_CM_UC_DI", "RST_EMERG_UC_DO", "", "";
+};
+
+&ocotp {
+ barebox,provide-mac-address = <&fec1 0x620>;
+};
+
+&reg_arm {
+ vin-supply = <&vdd_soc_in>;
+ regulator-allow-bypass;
+};
+
+&reg_soc {
+ vin-supply = <&vdd_soc_in>;
+ regulator-allow-bypass;
+};
+
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart6>;
+ uart-has-rtscts;
+ bluetooth {
+ compatible = "ti,wl1837-st";
+ enable-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&reg_4v>;
+ };
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart7>;
+ status = "okay";
+};
+
+&usbotg1 {
+ /* Micro-USB-plug */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbotg2 {
+ /* Modem (e.g. internal only) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg2>;
+ vbus-supply = <&swbst_reg>;
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ /* SDIO (WIFI/BT) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ bus-width = <4>;
+ vmmc-supply = <&reg_wl18xx_vmmc>;
+ vqmmc-supply = <&vgen6_reg>;
+ non-removable;
+ no-sd;
+ no-mmc;
+ keep-power-in-suspend;
+ cap-power-off-card;
+ max-frequency = <25000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wlcore: wlcore@2 {
+ compatible = "ti,wl1837";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_irq>;
+ reg = <2>;
+ interrupts-extended = <&gpio4 21 IRQ_TYPE_LEVEL_HIGH>;
+ tcxo-clock-frequency = <26000000>;
+ };
+};
+
+&usdhc2 {
+ /* eMMC */
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-1 = <&pinctrl_usdhc2_100MHZ>;
+ pinctrl-2 = <&pinctrl_usdhc2_200MHZ>;
+ bus-width = <8>;
+ vmmc-supply = <&sw1a_reg>;
+ vqmmc-supply = <&vgen1_reg>;
+ no-1-8-v;
+ non-removable;
+ no-sd;
+ no-sdio;
+ keep-power-in-suspend;
+ cap-mmc-hw-reset;
+ status = "okay";
+ /* bootloader specific */
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "barebox";
+ reg = <0x0 0x100000>;
+ };
+
+ environment_emmc: partition@100000 {
+ label = "barebox-environment";
+ reg = <0x100000 0x100000>;
+ };
+
+ backend_state_emmc: partition@200000 {
+ label = "barebox-state";
+ reg = <0x200000 0x100000>;
+ };
+ };
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+ status = "okay";
+};
+
+/* include the FIT public key for verifying on demand */
+#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
+#include CONFIG_BOOTM_FITIMAGE_PUBKEY
+#endif