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author | Oleksij Rempel <linux@rempel-privat.de> | 2017-08-09 17:51:30 +0200 |
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committer | Lucas Stach <l.stach@pengutronix.de> | 2017-08-15 15:39:25 +0200 |
commit | 196aa5cd216ae804f0e8f6673fa1d9b3e5d80c7e (patch) | |
tree | a3f01a4d59708962817b062f2da1f6e59a8817a8 /arch/mips/dts | |
parent | 1205276e0c02d80ea7581c2fc6e782808ed15e2a (diff) | |
download | barebox-196aa5cd216ae804f0e8f6673fa1d9b3e5d80c7e.tar.gz barebox-196aa5cd216ae804f0e8f6673fa1d9b3e5d80c7e.tar.xz |
MIPS: ath79: add initial QCA AR9344 SoC support
According to the documentation:
"The AR9344 is a highly integrated and feature-rich IEEE 802.11n 2x2 2.4/5 GHz
System-on-a-Chip (SoC) for advanced WLAN platforms.
It includes a MIPS 74Kc processor, PCI Express 1.1 Root Complex and Endpoint
interfaces, five port IEEE 802.3 Fast Ethernet Switch with MAC/PHY,
one MII/RMII/RGMII interface, one USB 2.0 MAC/PHY, and external memory
interface for serial Flash, SDRAM, DDR1 or DDR2, I2S/SPDIF-Out audio interface,
SLIC VOIP/PCM interface, two UARTs, and GPIOs that can be used for LED
controls or other general purpose interface configurations.
The AR9344 supports 802.11n operations up to 144 Mbps for 20 MHz and 300 Mbps
for 40 MHz respectively, and 802.11a/b/g data rates.
Additional features include Maximal Likelihood (ML) decoding, Low-Density
Parity Check (LDPC), Maximal Ratio Combining (MRC), Tx Beamforming (TxBF), and
On-Chip One-Time Programmable (OTP) memory."
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'arch/mips/dts')
-rw-r--r-- | arch/mips/dts/ar9344.dtsi | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/mips/dts/ar9344.dtsi b/arch/mips/dts/ar9344.dtsi new file mode 100644 index 0000000000..0838e8d7f7 --- /dev/null +++ b/arch/mips/dts/ar9344.dtsi @@ -0,0 +1,53 @@ +#include <dt-bindings/clock/ath79-clk.h> + +/ { + compatible = "qca,ar9344"; + + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "mips,mips74Kc"; + reg = <0>; + }; + }; + + ref: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + ahb { + compatible = "simple-bus"; + ranges; + + #address-cells = <1>; + #size-cells = <1>; + + uart0: uart@18020000 { + compatible = "ns16550a", "qca,ar9344-uart0"; + reg = <0x18020000 0x20>; + + reg-shift = <2>; + reg-io-width = <4>; + big-endian; + + status = "disabled"; + }; + + spi: spi@1f000000 { + compatible = "qca,ar7100-spi", "qca,ar9344-spi"; + reg = <0x1f000000 0x1c>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; +}; |