MIPS: ath79: add TP-Link WDR4300 board support

This provides low level initialization of pll and ddr2. Resulting binary
should work from SRAM, DDR2 and SPI flash. If started from DDR2 RAM
level initialization will skipped.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

1 files changed, 63 insertions, 0 deletions

diff --git a/arch/mips/dts/ar9344_tl_wdr4300.dts b/arch/mips/dts/ar9344_tl_wdr4300.dts
new file mode 100644
index 0000000000..b02c1d7307
--- /dev/null
+++ b/arch/mips/dts/ar9344_tl_wdr4300.dts
@@ -0,0 +1,63 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9344.dtsi"
+
+/ {
+	model = "TP-Link WDR4300";
+	compatible = "tplink,tl-wdr4300";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x8000000>;
+	};
+
+	chosen {
+		stdout-path = &uart0;
+
+		environment@0 {
+			compatible = "barebox,environment";
+			device-path = &spiflash, "partname:barebox-environment";
+		};
+	};
+};
+
+&ref {
+	clock-frequency = <40000000>;
+};
+
+&uart0 {
+	status = "okay";
+	clock-frequency = <40000000>;
+};
+
+&spi {
+	num-chipselects = <1>;
+	status = "okay";
+
+	/* Winbond W25Q64CV SPI flash */
+	spiflash: w25q64cv@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor", "winbond,w25q64cv";
+		spi-max-frequency = <104000000>;
+		reg = <0>;
+
+		partition@0 {
+			label = "barebox";
+			reg = <0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "barebox-environment";
+			reg = <0x80000 0x10000>;
+		};
+	};
+};