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author | Peter Mamonov <pmamonov@gmail.com> | 2018-05-22 18:33:35 +0300 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-24 12:45:10 +0200 |
commit | bc6fb02d885d61fab407d6814f0cfebc69b7d07c (patch) | |
tree | c851c0d301fbc43503c5e537fd53b63bdc8f2732 /arch/mips/include | |
parent | dddeabe237a6f5fb2e189d721733b1f54575edea (diff) | |
download | barebox-bc6fb02d885d61fab407d6814f0cfebc69b7d07c.tar.gz barebox-bc6fb02d885d61fab407d6814f0cfebc69b7d07c.tar.xz |
MIPS: import 64-bit address conversion macros
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/addrspace.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h index 17d480d083..dc44d7f790 100644 --- a/arch/mips/include/asm/addrspace.h +++ b/arch/mips/include/asm/addrspace.h @@ -73,6 +73,26 @@ #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) +/* + * Cache modes for XKPHYS address conversion macros + */ +#define K_CALG_COH_EXCL1_NOL2 0 +#define K_CALG_COH_SHRL1_NOL2 1 +#define K_CALG_UNCACHED 2 +#define K_CALG_NONCOHERENT 3 +#define K_CALG_COH_EXCL 4 +#define K_CALG_COH_SHAREABLE 5 +#define K_CALG_NOTUSED 6 +#define K_CALG_UNCACHED_ACCEL 7 + +/* + * 64-bit address conversions + */ +#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) +#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) +#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) +#define PHYS_TO_XKPHYS(cm, a) (XKPHYS | (_ACAST64_(cm) << 59) | (a)) + #else #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) |