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authorPeter Mamonov <pmamonov@gmail.com>2015-11-02 19:49:59 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2015-11-03 08:25:56 +0100
commit9c12b4ae1c8076847b991e29d6ca6f4a1caa14ad (patch)
treef837893d92c1b683a35e81cf725d5efd102bf857 /arch/mips/lib
parente5b991832926599892645668791870fd17e196e3 (diff)
downloadbarebox-9c12b4ae1c8076847b991e29d6ca6f4a1caa14ad.tar.gz
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mips: c-r4k: detect secondary cache
Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/lib')
-rw-r--r--arch/mips/lib/c-r4k.c31
-rw-r--r--arch/mips/lib/cpu-probe.c2
2 files changed, 31 insertions, 2 deletions
diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c
index 01b8665193..0a9dd0eb9a 100644
--- a/arch/mips/lib/c-r4k.c
+++ b/arch/mips/lib/c-r4k.c
@@ -91,7 +91,38 @@ static void probe_pcache(void)
}
}
+#define CONFIG_M (1 << 31)
+#define CONFIG2_SS_OFFSET 8
+#define CONFIG2_SL_OFFSET 4
+#define CONFIG2_SA_OFFSET 0
+static void probe_scache(void)
+{
+ struct cpuinfo_mips *c = &current_cpu_data;
+ unsigned int config2, config1, config = read_c0_config();
+ unsigned int ss, sl, sa;
+
+ if ((config & CONFIG_M) == 0)
+ goto noscache;
+ config1 = read_c0_config1();
+ if ((config1 & CONFIG_M) == 0)
+ goto noscache;
+ config2 = read_c0_config2();
+ ss = 0xf & (config2 >> CONFIG2_SS_OFFSET);
+ sl = 0xf & (config2 >> CONFIG2_SL_OFFSET);
+ sa = 0xf & (config2 >> CONFIG2_SA_OFFSET);
+ if (sl == 0)
+ goto noscache;
+ c->scache.linesz = 1 << (sl + 1);
+ c->scache.sets = 64 << ss;
+ c->scache.ways = 1 + sa;
+ c->scache.waysize = c->scache.linesz * c->scache.sets;
+ return;
+noscache:
+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
+}
+
void r4k_cache_init(void)
{
probe_pcache();
+ probe_scache();
}
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index 4622bcdd61..71dbaf6382 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -75,8 +75,6 @@ static void decode_configs(struct cpuinfo_mips *c)
c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
- c->scache.flags = MIPS_CACHE_NOT_PRESENT;
-
ok = decode_config0(c); /* Read Config registers. */
BUG_ON(!ok); /* Arch spec violation! */
}