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| author | Oleksij Rempel <linux@rempel-privat.de> | 2017-12-12 18:55:55 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-01-05 09:31:00 +0100 |
| commit | c552c154fef0ac149815c8aff75ef5744150536b (patch) | |
| tree | aba4bb583bc33fbc0d7d744db78a6f20dff4e32f /arch/mips/mach-ath79 | |
| parent | 5970e15e49f97122a540d30a55df02f10ef888ca (diff) | |
| download | barebox-c552c154fef0ac149815c8aff75ef5744150536b.tar.gz barebox-c552c154fef0ac149815c8aff75ef5744150536b.tar.xz | |
MIPS: ath79: ar9331: add generic RAM macro
with this macro, we should be able to cover most of existing
ar9331 based boards.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/mach-ath79')
| -rw-r--r-- | arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 | ||||
| -rw-r--r-- | arch/mips/mach-ath79/include/mach/pbl_macros.h | 37 |
2 files changed, 35 insertions, 3 deletions
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h index 31d33b3c42..f73700b5b9 100644 --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h @@ -139,6 +139,7 @@ #define AR71XX_RESET_FULL_CHIP BIT(24) +#define AR933X_BOOTSTRAP_MEM_TYPE BIT(13) #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h index 680fcbb867..9e4859b19f 100644 --- a/arch/mips/mach-ath79/include/mach/pbl_macros.h +++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h @@ -172,6 +172,40 @@ .set pop .endm +#define RESET_REG_BOOTSTRAP ((KSEG1 | AR71XX_RESET_BASE) \ + | AR933X_RESET_REG_BOOTSTRAP) + +.macro pbl_ar9331_ram_generic_config + .set push + .set noreorder + + li t5, RESET_REG_BOOTSTRAP + /* Documentation and source code of existing boot loaders disagree at + * this place. Doc says: MEM_TYPE[13:12]: + * - 00 = SDRAM + * - 01 = DDR1 + * - 10 = DDR2 + * The source code of most loaders do not care about BIT(12). So we do + * the same. + */ + li t6, AR933X_BOOTSTRAP_MEM_TYPE + lw t7, 0(t5); + and t6, t7, t6 + beq zero, t6, pbl_ar9331_ram_generic_ddr1 + nop + +pbl_ar9331_ram_generic_ddr2: + pbl_ar9331_ddr2_config + b pbl_ar9331_ram_generic_config + nop + +pbl_ar9331_ram_generic_ddr1: + pbl_ar9331_ddr1_config + +pbl_ar9331_ram_generic_config: + .set pop +.endm + #define GPIO_FUNC ((KSEG1 | AR71XX_GPIO_BASE) | AR71XX_GPIO_REG_FUNC) .macro pbl_ar9331_uart_enable @@ -179,9 +213,6 @@ | AR933X_GPIO_FUNC_RSRV15, GPIO_FUNC .endm -#define RESET_REG_BOOTSTRAP ((KSEG1 | AR71XX_RESET_BASE) \ - | AR933X_RESET_REG_BOOTSTRAP) - .macro pbl_ar9331_mdio_gpio_enable /* Bit 18 enables MDC and MDIO function on GPIO26 and GPIO28 */ pbl_reg_set (1 << 18), RESET_REG_BOOTSTRAP |