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author | Antony Pavlov <antonynpavlov@gmail.com> | 2015-11-11 11:35:42 +0300 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-11-13 07:52:44 +0100 |
commit | 6991f6ed5f669f816de9bec1d000fb12cf43687c (patch) | |
tree | cd6c716236c71fa8a4565d5fc252e7a00a86dd2b /arch/mips | |
parent | 1059d008417aedb7f083996eb36e3f131725cc78 (diff) | |
download | barebox-6991f6ed5f669f816de9bec1d000fb12cf43687c.tar.gz barebox-6991f6ed5f669f816de9bec1d000fb12cf43687c.tar.xz |
MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM
TP-Link MR3020 has 4 MiB flash boot ROM.
Usually boot ROM is mapped to 0xbfc00000.
However, as AR9331 allows to remap boot ROM to 0xbf000000
it's better to assume that boot ROM starts at 0xbf000000.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h index 08204fe656..d25f5aa337 100644 --- a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h +++ b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h @@ -28,9 +28,12 @@ mips_disable_interrupts + pbl_blt 0xbf000000 skip_pll_ram_config t8 + pbl_ar9331_pll pbl_ar9331_ddr1_config +skip_pll_ram_config: pbl_ar9331_uart_enable debug_ll_ar9331_init mips_nmon |