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authorAntony Pavlov <antonynpavlov@gmail.com>2014-09-10 11:42:23 +0400
committerSascha Hauer <s.hauer@pengutronix.de>2014-09-11 07:59:45 +0200
commit11a6204bab7f9d8284ac77ccb57293860a9056a9 (patch)
treeff85f7c29cdd81eac35e7e2245142db03b2a1da8 /arch/mips
parentb872653413aa103a7367cec0d4ad9650bc7316c1 (diff)
downloadbarebox-11a6204bab7f9d8284ac77ccb57293860a9056a9.tar.gz
barebox-11a6204bab7f9d8284ac77ccb57293860a9056a9.tar.xz
MIPS: dts: add jz4780.dtsi
Based on file from https://github.com/MIPS/CI20_linux/tree/ci20-v3.16 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/dts/jz4780.dtsi56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/mips/dts/jz4780.dtsi b/arch/mips/dts/jz4780.dtsi
new file mode 100644
index 000000000..9f0de5d1a
--- /dev/null
+++ b/arch/mips/dts/jz4780.dtsi
@@ -0,0 +1,56 @@
+#include "skeleton.dtsi"
+
+/ {
+ soc {
+ model = "Ingenic JZ4780";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <>;
+
+ wdt: wdt@10002000 {
+ compatible = "ingenic,jz4740-wdt";
+ reg = <0x10002000 0x10>;
+ };
+
+ uart0: serial@10030000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10030000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart1: serial@10031000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10031000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart2: serial@10032000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10032000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart3: serial@10033000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10033000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart4: serial@10034000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10034000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+ };
+};