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author | Antony Pavlov <antonynpavlov@gmail.com> | 2014-01-18 19:12:53 +0400 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-01-21 07:59:37 +0100 |
commit | 2118632f5b5a06fcef5610f101778d22350c1aec (patch) | |
tree | b0796152ea64842136bd3c144851ec76509603f0 /arch/mips | |
parent | a83c1ad761fb71491d1c90f26c4cae454833150d (diff) | |
download | barebox-2118632f5b5a06fcef5610f101778d22350c1aec.tar.gz barebox-2118632f5b5a06fcef5610f101778d22350c1aec.tar.xz |
MIPS: add Loongson-1B CPU Kbuild stuff
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 17 | ||||
-rw-r--r-- | arch/mips/Makefile | 3 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8cea076d4a..b819b49d1c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -118,6 +118,14 @@ choice prompt "CPU type" default CPU_MIPS32_R2 +config CPU_LOONGSON1B + bool "Loongson 1B" + depends on SYS_HAS_CPU_LOONGSON1B + select CPU_LOONGSON1 + help + The Loongson 1B is a 32-bit SoC, which implements the MIPS32 + release 2 instruction set. + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 @@ -174,6 +182,15 @@ config CPU_MIPS64_R2 endchoice +config CPU_LOONGSON1 + bool + select CPU_MIPS32 + select CPU_MIPSR2 + select CPU_SUPPORTS_32BIT_KERNEL + +config SYS_HAS_CPU_LOONGSON1B + bool + config SYS_HAS_CPU_MIPS32_R1 bool diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 7a6d6c093c..b4c0e7a74b 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -49,6 +49,9 @@ cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) -Wa,-mips32r2 -Wa,--trap cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) -Wa,-mips64 -Wa,--trap cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) -Wa,-mips64r2 -Wa,--trap +cflags-$(CONFIG_CPU_LOONGSON1) += \ + $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ + -Wa,-mips32r2 -Wa,--trap CPPFLAGS += -DTEXT_BASE=$(CONFIG_TEXT_BASE) |