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author | Ahmad Fatoum <ahmad@a3f.at> | 2021-04-16 08:24:36 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-05-03 14:07:21 +0200 |
commit | 263d3c2105edec00e1e3e67770eb0a870567dbc4 (patch) | |
tree | 434e93307b0eb357e1e5833128bdfeab1e971556 /arch/mips | |
parent | ffdb6a435e7ed5576f37d6cea14157d6ce51e16b (diff) | |
download | barebox-263d3c2105edec00e1e3e67770eb0a870567dbc4.tar.gz barebox-263d3c2105edec00e1e3e67770eb0a870567dbc4.tar.xz |
watchdog: add support for Intel TCO watchdog timer
Variants of the iTCO are integrated into many Intel southbridges.
They are most often accessed via PCI. Add a driver for the variant
found in the q35 QEMU machine.
It should be straight forward to extend the itco_chipset_info array
to support more variants in future as the need arises. To test, use:
qemu-system-x86_64 -M q35 -global ICH9-LPC.noreboot=false
The last option corresponds to a pin strap option, which can't be
influenced from within the VM.
Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Link: https://lore.barebox.org/20210416062436.332665-5-ahmad@a3f.at
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions