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| author | Antony Pavlov <antonynpavlov@gmail.com> | 2016-06-14 01:15:03 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-14 08:39:55 +0200 |
| commit | 5253099564fb2250d7aaaf72f53aaeedb7b3b7d8 (patch) | |
| tree | 310d1355ac8d76d7c7d130905ebd8e1251c7896f /arch/mips | |
| parent | 9f4e3730bd7d88e29537d91a7099a252f821f3ee (diff) | |
| download | barebox-5253099564fb2250d7aaaf72f53aaeedb7b3b7d8.tar.gz barebox-5253099564fb2250d7aaaf72f53aaeedb7b3b7d8.tar.xz | |
MIPS: ath79: dts: sync clk stuff with linux v4.7-rc2
Please see these linux kernel ath79 commits:
commit 1e6a3492e7bb12aa8ee26050ff6829c39ebaa152
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Thu Mar 17 06:34:17 2016 +0300
MIPS: dts: qca: introduce AR9331 devicetree
commit 5ae5c452e3361612cd8182eb8bdfecf0ebf42288
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Thu Mar 17 06:34:18 2016 +0300
MIPS: ath79: update devicetree clock support for AR9331
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/dts/ar9331.dtsi | 20 | ||||
| -rw-r--r-- | arch/mips/dts/black-swift.dts | 4 | ||||
| -rw-r--r-- | arch/mips/dts/tplink-mr3020.dts | 4 |
3 files changed, 23 insertions, 5 deletions
diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi index efc0531c93..4d430878c5 100644 --- a/arch/mips/dts/ar9331.dtsi +++ b/arch/mips/dts/ar9331.dtsi @@ -1,8 +1,13 @@ -#include <dt-bindings/clock/ar933x-clk.h> +#include <dt-bindings/clock/ath79-clk.h> #include "skeleton.dtsi" / { + ref: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -13,7 +18,8 @@ serial0: serial@18020000 { compatible = "qca,ar9330-uart"; reg = <0x18020000 0x14>; - clocks = <&ar9331_clk AR933X_CLK_UART>; + clocks = <&ref>; + clock-names = "uart"; status = "disabled"; }; @@ -27,9 +33,13 @@ status = "disabled"; }; - ar9331_clk: clock { - compatible = "qca,ar933x-clk"; - reg = <0x18050000 0x48>; + pll: pll-controller@18050000 { + compatible = "qca,ar9330-pll"; + reg = <0x18050000 0x100>; + + clocks = <&ref>; + clock-names = "ref"; + #clock-cells = <1>; }; diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts index d19c381df9..aa0aeaeead 100644 --- a/arch/mips/dts/black-swift.dts +++ b/arch/mips/dts/black-swift.dts @@ -37,6 +37,10 @@ }; }; +&ref { + clock-frequency = <25000000>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/tplink-mr3020.dts index 804d2908f0..a315713ba8 100644 --- a/arch/mips/dts/tplink-mr3020.dts +++ b/arch/mips/dts/tplink-mr3020.dts @@ -44,6 +44,10 @@ }; }; +&ref { + clock-frequency = <25000000>; +}; + &serial0 { status = "okay"; }; |