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authorAntony Pavlov <antonynpavlov@gmail.com>2014-04-02 11:41:31 +0400
committerSascha Hauer <s.hauer@pengutronix.de>2014-04-03 07:55:16 +0200
commit93f1811d8be37fe9fc6d40ce2be6955ae842438c (patch)
treeaa952bda54d4e0d837f2490c0e3529684c835c84 /arch/mips
parentb51cba9c9a2dd55a35e911178f0900a90122ad93 (diff)
downloadbarebox-93f1811d8be37fe9fc6d40ce2be6955ae842438c.tar.gz
barebox-93f1811d8be37fe9fc6d40ce2be6955ae842438c.tar.xz
MIPS: qemu-malta: add CBUS UART support
This patch adds CBUS UART dts support; also it adds the necessary macros for DEBUG_LL. qemu-malta supports three serial interfaces: * two ports are provided by the FDC37M817 Super I/O; this chip is connected via LPC bus to Intel 82371EB (PIIX4E) South Bridge; * the third serial port is provided by the discrete TI 16C550C (CBUS UART); this chip is connected via CBUS directly to the board's GT64120 North Bridge. See Malta User's Manual (MD00048) for details. CBUS UART Instructions for use: 1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config (or disable uart0 in dts) and compile barebox; 2. run qemu: qemu-system-mips -nographic -nodefaults \ -monitor null -M malta -m 256 \ -serial null -serial null -serial stdio \ -bios barebox-flash-image Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/dts/qemu-malta.dts8
-rw-r--r--arch/mips/mach-malta/include/mach/hardware.h3
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/dts/qemu-malta.dts b/arch/mips/dts/qemu-malta.dts
index b6b69c4955..67fe591f1f 100644
--- a/arch/mips/dts/qemu-malta.dts
+++ b/arch/mips/dts/qemu-malta.dts
@@ -25,6 +25,14 @@
clock-frequency = <1843200>;
};
+ uart2: serial@bf000900 {
+ compatible = "ns16550a";
+ reg = <0xbf000900 0x40>;
+ reg-shift = <3>;
+ /* no matter for emulated port */
+ clock-frequency = <1843200>;
+ };
+
nor0: flash@be000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/mips/mach-malta/include/mach/hardware.h b/arch/mips/mach-malta/include/mach/hardware.h
index 9345a67593..ba28cb86de 100644
--- a/arch/mips/mach-malta/include/mach/hardware.h
+++ b/arch/mips/mach-malta/include/mach/hardware.h
@@ -20,6 +20,9 @@
#define MALTA_PIIX4_UART0 0xb80003f8
+#define MALTA_CBUS_UART 0xbf000900
+#define MALTA_CBUS_UART_SHIFT 3
+
/*
* Reset register.
*/