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authorAhmad Fatoum <ahmad@a3f.at>2021-04-16 08:24:34 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-05-03 14:06:30 +0200
commitc3a53742f3ae16443ee80dfe3c525a863c577e40 (patch)
treed7ca2dc4485bbe0a6cee9841eb189a320f6f8232 /arch/mips
parentce65ca49fda3a849f80ddb7d8cafcf90ed765e2c (diff)
downloadbarebox-c3a53742f3ae16443ee80dfe3c525a863c577e40.tar.gz
barebox-c3a53742f3ae16443ee80dfe3c525a863c577e40.tar.xz
PCI: support PCI BIOS preassigned buses
When running under UEFI, barebox should no redo PCI enumeration, because the UEFI implementation will likely already have drivers that won't cope with e.g. BAR addresses changing. The user-visible effect of this is that likely the framebuffer will stop working because the UEFI driver won't be able to access it any longer. Support this configuration by changing the PCI code to consult the new pcibios_assign_all_busses(). When it's true, there is no change to previous behavior. When it's false, reconfiguration is omitted and instead current configuration is read back from the bus. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20210416062436.332665-3-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/pci.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
new file mode 100644
index 0000000000..d7419cabe7
--- /dev/null
+++ b/arch/mips/include/asm/pci.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_PCI_H
+#define __ASM_PCI_H
+
+#define pcibios_assign_all_busses() 1
+
+#endif