diff options
| author | Renaud Barbier <renaud.barbier@ge.com> | 2014-01-15 11:47:43 +0000 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-01-16 14:00:30 +0100 |
| commit | b79f78997d142bf27716be637799acc8e0040ca2 (patch) | |
| tree | b546f2b3c052d18fc7c675e212e5f4f8fe74aefa /arch/ppc/include | |
| parent | b2c5a39dfccc8367e83fa02bfd529ce710e2d8a1 (diff) | |
| download | barebox-b79f78997d142bf27716be637799acc8e0040ca2.tar.gz barebox-b79f78997d142bf27716be637799acc8e0040ca2.tar.xz | |
ppc: cpu-85xx: import U-Boot start-up code
Import U-Boot start-up code from version git-9407c3fc to include the
latest CPUs errata and make future U-Boot code inclusion easier. The
code import is limited to the currently supported CPUs P2020/MPC8544.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/ppc/include')
| -rw-r--r-- | arch/ppc/include/asm/mmu.h | 3 | ||||
| -rw-r--r-- | arch/ppc/include/asm/processor.h | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/ppc/include/asm/mmu.h b/arch/ppc/include/asm/mmu.h index c886d14e77..72233b4175 100644 --- a/arch/ppc/include/asm/mmu.h +++ b/arch/ppc/include/asm/mmu.h @@ -462,6 +462,9 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower); #define BOOKE_PAGESZ_2G 21 #define BOOKE_PAGESZ_4G 22 +#define TLBIVAX_ALL 4 +#define TLBIVAX_TLB0 0 + #if defined(CONFIG_MPC86xx) #define LAWBAR_BASE_ADDR 0x00FFFFFF #define LAWAR_TRGT_IF 0x01F00000 diff --git a/arch/ppc/include/asm/processor.h b/arch/ppc/include/asm/processor.h index 059d33f340..819babb675 100644 --- a/arch/ppc/include/asm/processor.h +++ b/arch/ppc/include/asm/processor.h @@ -430,6 +430,7 @@ #define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */ #define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */ #define SPRN_TLB1PS 0x159 /* TLB 1 Page Size Register */ +#define TLBnCFG_NENTRY_MASK 0x00000fff #define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */ #define SPRN_MMUCFG 0x3f7 /* MMU Configuration Register */ #define MMUCFG_MAVN 0x00000003 /* MMU Architecture Version Number */ @@ -470,6 +471,7 @@ #define SPRN_MSSCRO 0x3f6 #endif +#define SPRN_HDBCR0 0x3d0 /* Short-hand versions for a number of the above SPRNs */ |