svn_rev_163

move setup of bd_t to extra function, add some debug PUTHEX_LL

1 files changed, 96 insertions, 152 deletions

diff --git a/arch/ppc/lib/board.c b/arch/ppc/lib/board.c
index bd8b7ef7fb..65f82d23e6 100644
--- a/arch/ppc/lib/board.c
+++ b/arch/ppc/lib/board.c
@@ -21,6 +21,7 @@
  * MA 02111-1307 USA
  */
 
+#include <debug_ll.h>
 #include <common.h>
 #include <watchdog.h>
 #include <command.h>
@@ -243,6 +244,84 @@ static int init_func_watchdog_reset (void)
 # define INIT_FUNC_WATCHDOG_RESET	/* undef */
 #endif /* CONFIG_WATCHDOG */
 
+static void init_bd(bd_t *bd, ulong bootflag) {
+	bd->bi_memstart  = CFG_SDRAM_BASE;	/* start of  DRAM memory	*/
+	bd->bi_memsize   = gd->ram_size;	/* size  of  DRAM memory in bytes */
+
+#ifdef CONFIG_IP860
+	bd->bi_sramstart = SRAM_BASE;	/* start of  SRAM memory	*/
+	bd->bi_sramsize  = SRAM_SIZE;	/* size  of  SRAM memory	*/
+#elif defined CONFIG_MPC8220
+	bd->bi_sramstart = CFG_SRAM_BASE;	/* start of  SRAM memory	*/
+	bd->bi_sramsize  = CFG_SRAM_SIZE;	/* size  of  SRAM memory	*/
+#else
+	bd->bi_sramstart = 0;		/* FIXME */ /* start of  SRAM memory	*/
+	bd->bi_sramsize  = 0;		/* FIXME */ /* size  of  SRAM memory	*/
+#endif
+
+#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+	bd->bi_immr_base = CFG_IMMR;	/* base  of IMMR register     */
+#endif
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
+#endif
+#if defined(CONFIG_MPC83XX)
+	bd->bi_immrbar = CFG_IMMR;
+#endif
+#if defined(CONFIG_MPC8220)
+	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
+	bd->bi_inpfreq   = gd->inp_clk;
+	bd->bi_pcifreq   = gd->pci_clk;
+	bd->bi_vcofreq   = gd->vco_clk;
+	bd->bi_pevfreq   = gd->pev_clk;
+	bd->bi_flbfreq   = gd->flb_clk;
+
+	/* store bootparam to sram (backward compatible), here? */
+	{
+		u32 *sram = (u32 *)CFG_SRAM_BASE;
+		*sram++ = gd->ram_size;
+		*sram++ = gd->bus_clk;
+		*sram++ = gd->inp_clk;
+		*sram++ = gd->cpu_clk;
+		*sram++ = gd->vco_clk;
+		*sram++ = gd->flb_clk;
+		*sram++ = 0xb8c3ba11;  /* boot signature */
+	}
+#endif
+
+	bd->bi_bootflags = bootflag;	/* boot / reboot flag (for LynxOS)    */
+
+	WATCHDOG_RESET ();
+	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
+	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
+#if defined(CONFIG_CPM2)
+	bd->bi_cpmfreq = gd->cpm_clk;
+	bd->bi_brgfreq = gd->brg_clk;
+	bd->bi_sccfreq = gd->scc_clk;
+	bd->bi_vco     = gd->vco_out;
+#endif /* CONFIG_CPM2 */
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_ipbfreq = gd->ipb_clk;
+	bd->bi_pcifreq = gd->pci_clk;
+#endif /* CONFIG_MPC5xxx */
+	bd->bi_baudrate = gd->baudrate;	/* Console Baudrate     */
+
+#ifdef CFG_EXTBDINFO
+	strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
+	strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
+
+	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
+	bd->bi_plb_busfreq = gd->bus_clk;
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+	bd->bi_pci_busfreq = get_PCI_freq ();
+	bd->bi_opbfreq = get_OPB_freq ();
+#elif defined(CONFIG_XILINX_ML300)
+	bd->bi_pci_busfreq = get_PCI_freq ();
+#endif
+#endif
+}
+
 /************************************************************************
  * Initialization sequence						*
  ************************************************************************
@@ -250,32 +329,11 @@ static int init_func_watchdog_reset (void)
 
 init_fnc_t *init_sequence[] = {
 
-#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 	get_clocks,		/* get CPU and bus clocks (etc.) */
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
-    && !defined(CONFIG_TQM885D)
-	adjust_sdram_tbs_8xx,
-#endif
-	init_timebase,
-#endif
-#if defined(CONFIG_BOARD_POSTCLK_INIT)
-	board_postclk_init,
-#endif
-#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
-	get_clocks_866,		/* get CPU and bus clocks according to the environment variable */
-	sdram_adjust_866,	/* adjust sdram refresh rate according to the new clock */
 	init_timebase,
-#endif
 	serial_init,
 	checkcpu,
-#if defined(CONFIG_MPC5xxx)
-	prt_mpc5xxx_clks,
-#endif /* CONFIG_MPC5xxx */
 	checkboard,
-	INIT_FUNC_WATCHDOG_INIT
-	INIT_FUNC_WATCHDOG_RESET
-	INIT_FUNC_WATCHDOG_RESET
-	INIT_FUNC_WATCHDOG_RESET
 
 	NULL,			/* Terminate this list */
 };
@@ -303,28 +361,21 @@ void board_init_f (ulong bootflag)
 	ulong *s;
 	gd_t *id;
 	init_fnc_t **init_fnc_ptr;
-#ifdef CONFIG_PRAM
-	int i;
-	ulong reg;
-	uchar tmp[64];		/* long enough for environment variables */
-#endif
 
 	/* Pointer is writable since we allocated a register for it */
 	gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
 	/* compiler optimization barrier needed for GCC >= 3.4 */
 	__asm__ __volatile__("": : :"memory");
 
-#if !defined(CONFIG_CPM2)
 	/* Clear initial global data */
 	memset ((void *) gd, 0, sizeof (gd_t));
-#endif
-
+#if 0
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		if ((*init_fnc_ptr) () != 0) {
 			hang ();
 		}
 	}
-
+#endif
 	/*
 	 * Now that we have DRAM mapped and working, we can
 	 * relocate the code and continue running from DRAM.
@@ -338,46 +389,9 @@ void board_init_f (ulong bootflag)
 	 */
 	len = (ulong)&_end - CFG_MONITOR_BASE;
 
-#ifndef	CONFIG_VERY_BIG_RAM
-	addr = CFG_SDRAM_BASE + gd->ram_size;
-#else
-	/* only allow stack below 256M */
-	addr = CFG_SDRAM_BASE +
-	       (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
-#endif
-
-#ifdef CONFIG_LOGBUFFER
-	/* reserve kernel log buffer */
-	addr -= (LOGBUFF_RESERVE);
-	debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
-#endif
-
-#ifdef CONFIG_PRAM
-	/*
-	 * reserve protected RAM
-	 */
-	i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
-	reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
-	addr -= (reg << 10);		/* size is in kB */
-	debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
-#endif /* CONFIG_PRAM */
-
-	/* round down to next 4 kB limit */
-	addr &= ~(4096 - 1);
-	debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
-
-#ifdef CONFIG_LCD
-	/* reserve memory for LCD display (always full pages) */
-	addr = lcd_setmem (addr);
-	gd->fb_base = addr;
-#endif /* CONFIG_LCD */
-
-#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
-	/* reserve memory for video display (always full pages) */
-	addr = video_setmem (addr);
-	gd->fb_base = addr;
-#endif /* CONFIG_VIDEO  */
-
+	addr = CFG_SDRAM_BASE + initdram (0);
+PUTHEX_LL(addr);
+PUTC(':');
 	/*
 	 * reserve memory for U-Boot code, data & bss
 	 * round down to next 4 kB limit
@@ -389,12 +403,10 @@ void board_init_f (ulong bootflag)
 	addr &= ~(65536 - 1);
 #endif
 
+PUTHEX_LL(addr);
+PUTC(':');
 	debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
 
-#ifdef CONFIG_AMIGAONEG3SE
-	gd->relocaddr = addr;
-#endif
-
 	/*
 	 * reserve memory for malloc() arena
 	 */
@@ -433,82 +445,7 @@ void board_init_f (ulong bootflag)
 	/*
 	 * Save local variables to board info struct
 	 */
-
-	bd->bi_memstart  = CFG_SDRAM_BASE;	/* start of  DRAM memory	*/
-	bd->bi_memsize   = gd->ram_size;	/* size  of  DRAM memory in bytes */
-
-#ifdef CONFIG_IP860
-	bd->bi_sramstart = SRAM_BASE;	/* start of  SRAM memory	*/
-	bd->bi_sramsize  = SRAM_SIZE;	/* size  of  SRAM memory	*/
-#elif defined CONFIG_MPC8220
-	bd->bi_sramstart = CFG_SRAM_BASE;	/* start of  SRAM memory	*/
-	bd->bi_sramsize  = CFG_SRAM_SIZE;	/* size  of  SRAM memory	*/
-#else
-	bd->bi_sramstart = 0;		/* FIXME */ /* start of  SRAM memory	*/
-	bd->bi_sramsize  = 0;		/* FIXME */ /* size  of  SRAM memory	*/
-#endif
-
-#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
-    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
-	bd->bi_immr_base = CFG_IMMR;	/* base  of IMMR register     */
-#endif
-#if defined(CONFIG_MPC5xxx)
-	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
-#endif
-#if defined(CONFIG_MPC83XX)
-	bd->bi_immrbar = CFG_IMMR;
-#endif
-#if defined(CONFIG_MPC8220)
-	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
-	bd->bi_inpfreq   = gd->inp_clk;
-	bd->bi_pcifreq   = gd->pci_clk;
-	bd->bi_vcofreq   = gd->vco_clk;
-	bd->bi_pevfreq   = gd->pev_clk;
-	bd->bi_flbfreq   = gd->flb_clk;
-
-	/* store bootparam to sram (backward compatible), here? */
-	{
-		u32 *sram = (u32 *)CFG_SRAM_BASE;
-		*sram++ = gd->ram_size;
-		*sram++ = gd->bus_clk;
-		*sram++ = gd->inp_clk;
-		*sram++ = gd->cpu_clk;
-		*sram++ = gd->vco_clk;
-		*sram++ = gd->flb_clk;
-		*sram++ = 0xb8c3ba11;  /* boot signature */
-	}
-#endif
-
-	bd->bi_bootflags = bootflag;	/* boot / reboot flag (for LynxOS)    */
-
-	WATCHDOG_RESET ();
-	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
-	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
-#if defined(CONFIG_CPM2)
-	bd->bi_cpmfreq = gd->cpm_clk;
-	bd->bi_brgfreq = gd->brg_clk;
-	bd->bi_sccfreq = gd->scc_clk;
-	bd->bi_vco     = gd->vco_out;
-#endif /* CONFIG_CPM2 */
-#if defined(CONFIG_MPC5xxx)
-	bd->bi_ipbfreq = gd->ipb_clk;
-	bd->bi_pcifreq = gd->pci_clk;
-#endif /* CONFIG_MPC5xxx */
-	bd->bi_baudrate = gd->baudrate;	/* Console Baudrate     */
-
-#ifdef CFG_EXTBDINFO
-	strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
-	strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
-
-	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
-	bd->bi_plb_busfreq = gd->bus_clk;
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
-	bd->bi_pci_busfreq = get_PCI_freq ();
-	bd->bi_opbfreq = get_OPB_freq ();
-#elif defined(CONFIG_XILINX_ML300)
-	bd->bi_pci_busfreq = get_PCI_freq ();
-#endif
-#endif
+	init_bd(bd, bootflag);
 
 	debug ("New Stack Pointer is: %08lx\n", addr_sp);
 
@@ -521,7 +458,13 @@ void board_init_f (ulong bootflag)
 
 	WATCHDOG_RESET();
 
-	memcpy (id, (void *)gd, sizeof (gd_t));
+//	memcpy (id, (void *)gd, sizeof (gd_t));
+PUTHEX_LL(addr_sp);
+PUTC(':');
+PUTHEX_LL(id);
+PUTC(':');
+PUTHEX_LL(addr);
+PUTC(':');
 
 	relocate_code (addr_sp, id, addr);
 
@@ -544,7 +487,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	bd_t *bd;
 	int i;
 	extern void malloc_bin_reloc (void);
-
+PUTC('B');
+while(1);
 #ifndef CFG_NO_FLASH
 	ulong flash_size;
 #endif