svn_rev_154

move lib_ppc to arch/ppc

10 files changed, 2261 insertions, 0 deletions

diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
new file mode 100644
index 0000000000..2ba034f1ee
--- /dev/null
+++ b/arch/ppc/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(ARCH).a
+
+SOBJS	= ppcstring.o ticks.o
+
+COBJS	= board.o \
+	  bat_rw.o cache.o extable.o kgdb.o time.o interrupts.o
+
+SRCS 	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/arch/ppc/bat_rw.c b/arch/ppc/bat_rw.c
new file mode 100644
index 0000000000..912efa72b4
--- /dev/null
+++ b/arch/ppc/bat_rw.c
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+
+int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)
+{
+	switch (bat) {
+	case IBAT0:
+		mtspr (IBAT0L, lower);
+		mtspr (IBAT0U, upper);
+		break;
+
+	case IBAT1:
+		mtspr (IBAT1L, lower);
+		mtspr (IBAT1U, upper);
+		break;
+
+	case IBAT2:
+		mtspr (IBAT2L, lower);
+		mtspr (IBAT2U, upper);
+		break;
+
+	case IBAT3:
+		mtspr (IBAT3L, lower);
+		mtspr (IBAT3U, upper);
+		break;
+
+	case DBAT0:
+		mtspr (DBAT0L, lower);
+		mtspr (DBAT0U, upper);
+		break;
+
+	case DBAT1:
+		mtspr (DBAT1L, lower);
+		mtspr (DBAT1U, upper);
+		break;
+
+	case DBAT2:
+		mtspr (DBAT2L, lower);
+		mtspr (DBAT2U, upper);
+		break;
+
+	case DBAT3:
+		mtspr (DBAT3L, lower);
+		mtspr (DBAT3U, upper);
+		break;
+
+	default:
+		return (-1);
+	}
+
+	return (0);
+}
+
+int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower)
+{
+	unsigned long register u;
+	unsigned long register l;
+
+	switch (bat) {
+	case IBAT0:
+		l = mfspr (IBAT0L);
+		u = mfspr (IBAT0U);
+		break;
+
+	case IBAT1:
+		l = mfspr (IBAT1L);
+		u = mfspr (IBAT1U);
+		break;
+
+	case IBAT2:
+		l = mfspr (IBAT2L);
+		u = mfspr (IBAT2U);
+		break;
+
+	case IBAT3:
+		l = mfspr (IBAT3L);
+		u = mfspr (IBAT3U);
+		break;
+
+	case DBAT0:
+		l = mfspr (DBAT0L);
+		u = mfspr (DBAT0U);
+		break;
+
+	case DBAT1:
+		l = mfspr (DBAT1L);
+		u = mfspr (DBAT1U);
+		break;
+
+	case DBAT2:
+		l = mfspr (DBAT2L);
+		u = mfspr (DBAT2U);
+		break;
+
+	case DBAT3:
+		l = mfspr (DBAT3L);
+		u = mfspr (DBAT3U);
+		break;
+
+	default:
+		return (-1);
+	}
+
+	*upper = u;
+	*lower = l;
+
+	return (0);
+}
diff --git a/arch/ppc/board.c b/arch/ppc/board.c
new file mode 100644
index 0000000000..797b925e58
--- /dev/null
+++ b/arch/ppc/board.c
@@ -0,0 +1,1098 @@
+/*
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+#include <malloc.h>
+#include <devices.h>
+#ifdef CONFIG_8xx
+#include <mpc8xx.h>
+#endif
+#ifdef CONFIG_5xx
+#include <mpc5xx.h>
+#endif
+#ifdef CONFIG_MPC5xxx
+#include <mpc5xxx.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#include <ide.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#include <scsi.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#include <kgdb.h>
+#endif
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#endif
+#include <net.h>
+#include <serial.h>
+#ifdef CFG_ALLOC_DPRAM
+#if !defined(CONFIG_CPM2)
+#include <commproc.h>
+#endif
+#endif
+#include <version.h>
+#if defined(CONFIG_BAB7xx)
+#include <w83c553f.h>
+#endif
+#include <dtt.h>
+#if defined(CONFIG_POST)
+#include <post.h>
+#endif
+#if defined(CONFIG_LOGBUFFER)
+#include <logbuff.h>
+#endif
+#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
+#include <asm/cache.h>
+#endif
+#ifdef CONFIG_PS2KBD
+#include <keyboard.h>
+#endif
+
+#ifdef CFG_UPDATE_FLASH_SIZE
+extern int update_flash_size (int flash_size);
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+void doc_init (void);
+#endif
+#if defined(CONFIG_HARD_I2C) || \
+    defined(CONFIG_SOFT_I2C)
+#include <i2c.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+void nand_init (void);
+#endif
+
+static char *failed = "*** failed ***\n";
+
+#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
+extern flash_info_t flash_info[];
+#endif
+
+#include <environment.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CFG_ENV_IS_EMBEDDED)
+#define TOTAL_MALLOC_LEN	CFG_MALLOC_LEN
+#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
+	(CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
+      defined(CFG_ENV_IS_IN_NVRAM)
+#define	TOTAL_MALLOC_LEN	(CFG_MALLOC_LEN + CFG_ENV_SIZE)
+#else
+#define	TOTAL_MALLOC_LEN	CFG_MALLOC_LEN
+#endif
+
+extern ulong __init_end;
+extern ulong _end;
+ulong monitor_flash_len;
+
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#include <bedbug/type.h>
+#endif
+
+/*
+ * Begin and End of memory area for malloc(), and current "brk"
+ */
+static	ulong	mem_malloc_start = 0;
+static	ulong	mem_malloc_end	 = 0;
+static	ulong	mem_malloc_brk	 = 0;
+
+/************************************************************************
+ * Utilities								*
+ ************************************************************************
+ */
+
+/*
+ * The Malloc area is immediately below the monitor copy in DRAM
+ */
+static void mem_malloc_init (void)
+{
+	ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
+
+	mem_malloc_end = dest_addr;
+	mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
+	mem_malloc_brk = mem_malloc_start;
+
+	memset ((void *) mem_malloc_start,
+		0,
+		mem_malloc_end - mem_malloc_start);
+}
+
+void *sbrk (ptrdiff_t increment)
+{
+	ulong old = mem_malloc_brk;
+	ulong new = old + increment;
+
+	if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
+		return (NULL);
+	}
+	mem_malloc_brk = new;
+	return ((void *) old);
+}
+
+char *strmhz (char *buf, long hz)
+{
+	long l, n;
+	long m;
+
+	n = hz / 1000000L;
+	l = sprintf (buf, "%ld", n);
+	m = (hz % 1000000L) / 1000L;
+	if (m != 0)
+		sprintf (buf + l, ".%03ld", m);
+	return (buf);
+}
+
+/*
+ * All attempts to come up with a "common" initialization sequence
+ * that works for all boards and architectures failed: some of the
+ * requirements are just _too_ different. To get rid of the resulting
+ * mess of board dependend #ifdef'ed code we now make the whole
+ * initialization sequence configurable to the user.
+ *
+ * The requirements for any new initalization function is simple: it
+ * receives a pointer to the "global data" structure as it's only
+ * argument, and returns an integer return code, where 0 means
+ * "continue" and != 0 means "fatal error, hang the system".
+ */
+typedef int (init_fnc_t) (void);
+
+/************************************************************************
+ * Init Utilities							*
+ ************************************************************************
+ * Some of this code should be moved into the core functions,
+ * but let's get it working (again) first...
+ */
+
+static int init_baudrate (void)
+{
+	char tmp[64];	/* long enough for environment variables */
+	int i = getenv_r ("baudrate", tmp, sizeof (tmp));
+
+	gd->baudrate = (i > 0)
+			? (int) simple_strtoul (tmp, NULL, 10)
+			: CONFIG_BAUDRATE;
+	return (0);
+}
+
+/***********************************************************************/
+
+#ifdef CONFIG_ADD_RAM_INFO
+void board_add_ram_info(int);
+#endif
+
+static int init_func_ram (void)
+{
+#ifdef	CONFIG_BOARD_TYPES
+	int board_type = gd->board_type;
+#else
+	int board_type = 0;	/* use dummy arg */
+#endif
+	puts ("DRAM:  ");
+
+	if ((gd->ram_size = initdram (board_type)) > 0) {
+		print_size (gd->ram_size, "");
+#ifdef CONFIG_ADD_RAM_INFO
+		board_add_ram_info(0);
+#endif
+		putc('\n');
+		return (0);
+	}
+	puts (failed);
+	return (1);
+}
+
+/***********************************************************************/
+
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+static int init_func_i2c (void)
+{
+	puts ("I2C:   ");
+	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+	puts ("ready\n");
+	return (0);
+}
+#endif
+
+/***********************************************************************/
+
+#if defined(CONFIG_WATCHDOG)
+static int init_func_watchdog_init (void)
+{
+	puts ("       Watchdog enabled\n");
+	WATCHDOG_RESET ();
+	return (0);
+}
+# define INIT_FUNC_WATCHDOG_INIT	init_func_watchdog_init,
+
+static int init_func_watchdog_reset (void)
+{
+	WATCHDOG_RESET ();
+	return (0);
+}
+# define INIT_FUNC_WATCHDOG_RESET	init_func_watchdog_reset,
+#else
+# define INIT_FUNC_WATCHDOG_INIT	/* undef */
+# define INIT_FUNC_WATCHDOG_RESET	/* undef */
+#endif /* CONFIG_WATCHDOG */
+
+/************************************************************************
+ * Initialization sequence						*
+ ************************************************************************
+ */
+
+init_fnc_t *init_sequence[] = {
+
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+	board_early_init_f,
+#endif
+
+#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
+	get_clocks,		/* get CPU and bus clocks (etc.) */
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
+    && !defined(CONFIG_TQM885D)
+	adjust_sdram_tbs_8xx,
+#endif
+	init_timebase,
+#endif
+#ifdef CFG_ALLOC_DPRAM
+#if !defined(CONFIG_CPM2)
+	dpram_init,
+#endif
+#endif
+#if defined(CONFIG_BOARD_POSTCLK_INIT)
+	board_postclk_init,
+#endif
+	env_init,
+#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
+	get_clocks_866,		/* get CPU and bus clocks according to the environment variable */
+	sdram_adjust_866,	/* adjust sdram refresh rate according to the new clock */
+	init_timebase,
+#endif
+	init_baudrate,
+	serial_init,
+	console_init_f,
+	display_options,
+#if defined(CONFIG_8260)
+	prt_8260_rsr,
+	prt_8260_clks,
+#endif /* CONFIG_8260 */
+
+#if defined(CONFIG_MPC83XX)
+	print_clock_conf,
+#endif
+
+	checkcpu,
+#if defined(CONFIG_MPC5xxx)
+	prt_mpc5xxx_clks,
+#endif /* CONFIG_MPC5xxx */
+#if defined(CONFIG_MPC8220)
+	prt_mpc8220_clks,
+#endif
+	checkboard,
+	INIT_FUNC_WATCHDOG_INIT
+#if defined(CONFIG_MISC_INIT_F)
+	misc_init_f,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+	init_func_i2c,
+#endif
+#if defined(CONFIG_DTT)		/* Digital Thermometers and Thermostats */
+	dtt_init,
+#endif
+#ifdef CONFIG_POST
+	post_init_f,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+	init_func_ram,
+#if defined(CFG_DRAM_TEST)
+	testdram,
+#endif /* CFG_DRAM_TEST */
+	INIT_FUNC_WATCHDOG_RESET
+
+	NULL,			/* Terminate this list */
+};
+
+/************************************************************************
+ *
+ * This is the first part of the initialization sequence that is
+ * implemented in C, but still running from ROM.
+ *
+ * The main purpose is to provide a (serial) console interface as
+ * soon as possible (so we can see any error messages), and to
+ * initialize the RAM so that we can relocate the monitor code to
+ * RAM.
+ *
+ * Be aware of the restrictions: global data is read-only, BSS is not
+ * initialized, and stack space is limited to a few kB.
+ *
+ ************************************************************************
+ */
+
+void board_init_f (ulong bootflag)
+{
+	bd_t *bd;
+	ulong len, addr, addr_sp;
+	ulong *s;
+	gd_t *id;
+	init_fnc_t **init_fnc_ptr;
+#ifdef CONFIG_PRAM
+	int i;
+	ulong reg;
+	uchar tmp[64];		/* long enough for environment variables */
+#endif
+
+	/* Pointer is writable since we allocated a register for it */
+	gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
+	/* compiler optimization barrier needed for GCC >= 3.4 */
+	__asm__ __volatile__("": : :"memory");
+
+#if !defined(CONFIG_CPM2)
+	/* Clear initial global data */
+	memset ((void *) gd, 0, sizeof (gd_t));
+#endif
+
+	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
+		if ((*init_fnc_ptr) () != 0) {
+			hang ();
+		}
+	}
+
+	/*
+	 * Now that we have DRAM mapped and working, we can
+	 * relocate the code and continue running from DRAM.
+	 *
+	 * Reserve memory at end of RAM for (top down in that order):
+	 *  - kernel log buffer
+	 *  - protected RAM
+	 *  - LCD framebuffer
+	 *  - monitor code
+	 *  - board info struct
+	 */
+	len = (ulong)&_end - CFG_MONITOR_BASE;
+
+#ifndef	CONFIG_VERY_BIG_RAM
+	addr = CFG_SDRAM_BASE + gd->ram_size;
+#else
+	/* only allow stack below 256M */
+	addr = CFG_SDRAM_BASE +
+	       (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
+#endif
+
+#ifdef CONFIG_LOGBUFFER
+	/* reserve kernel log buffer */
+	addr -= (LOGBUFF_RESERVE);
+	debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
+#endif
+
+#ifdef CONFIG_PRAM
+	/*
+	 * reserve protected RAM
+	 */
+	i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
+	reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
+	addr -= (reg << 10);		/* size is in kB */
+	debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
+#endif /* CONFIG_PRAM */
+
+	/* round down to next 4 kB limit */
+	addr &= ~(4096 - 1);
+	debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
+
+#ifdef CONFIG_LCD
+	/* reserve memory for LCD display (always full pages) */
+	addr = lcd_setmem (addr);
+	gd->fb_base = addr;
+#endif /* CONFIG_LCD */
+
+#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
+	/* reserve memory for video display (always full pages) */
+	addr = video_setmem (addr);
+	gd->fb_base = addr;
+#endif /* CONFIG_VIDEO  */
+
+	/*
+	 * reserve memory for U-Boot code, data & bss
+	 * round down to next 4 kB limit
+	 */
+	addr -= len;
+	addr &= ~(4096 - 1);
+#ifdef CONFIG_E500
+	/* round down to next 64 kB limit so that IVPR stays aligned */
+	addr &= ~(65536 - 1);
+#endif
+
+	debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
+
+#ifdef CONFIG_AMIGAONEG3SE
+	gd->relocaddr = addr;
+#endif
+
+	/*
+	 * reserve memory for malloc() arena
+	 */
+	addr_sp = addr - TOTAL_MALLOC_LEN;
+	debug ("Reserving %dk for malloc() at: %08lx\n",
+			TOTAL_MALLOC_LEN >> 10, addr_sp);
+
+	/*
+	 * (permanently) allocate a Board Info struct
+	 * and a permanent copy of the "global" data
+	 */
+	addr_sp -= sizeof (bd_t);
+	bd = (bd_t *) addr_sp;
+	gd->bd = bd;
+	debug ("Reserving %d Bytes for Board Info at: %08lx\n",
+			sizeof (bd_t), addr_sp);
+	addr_sp -= sizeof (gd_t);
+	id = (gd_t *) addr_sp;
+	debug ("Reserving %d Bytes for Global Data at: %08lx\n",
+			sizeof (gd_t), addr_sp);
+
+	/*
+	 * Finally, we set up a new (bigger) stack.
+	 *
+	 * Leave some safety gap for SP, force alignment on 16 byte boundary
+	 * Clear initial stack frame
+	 */
+	addr_sp -= 16;
+	addr_sp &= ~0xF;
+	s = (ulong *)addr_sp;
+	*s-- = 0;
+	*s-- = 0;
+	addr_sp = (ulong)s;
+	debug ("Stack Pointer at: %08lx\n", addr_sp);
+
+	/*
+	 * Save local variables to board info struct
+	 */
+
+	bd->bi_memstart  = CFG_SDRAM_BASE;	/* start of  DRAM memory	*/
+	bd->bi_memsize   = gd->ram_size;	/* size  of  DRAM memory in bytes */
+
+#ifdef CONFIG_IP860
+	bd->bi_sramstart = SRAM_BASE;	/* start of  SRAM memory	*/
+	bd->bi_sramsize  = SRAM_SIZE;	/* size  of  SRAM memory	*/
+#elif defined CONFIG_MPC8220
+	bd->bi_sramstart = CFG_SRAM_BASE;	/* start of  SRAM memory	*/
+	bd->bi_sramsize  = CFG_SRAM_SIZE;	/* size  of  SRAM memory	*/
+#else
+	bd->bi_sramstart = 0;		/* FIXME */ /* start of  SRAM memory	*/
+	bd->bi_sramsize  = 0;		/* FIXME */ /* size  of  SRAM memory	*/
+#endif
+
+#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+	bd->bi_immr_base = CFG_IMMR;	/* base  of IMMR register     */
+#endif
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
+#endif
+#if defined(CONFIG_MPC83XX)
+	bd->bi_immrbar = CFG_IMMR;
+#endif
+#if defined(CONFIG_MPC8220)
+	bd->bi_mbar_base = CFG_MBAR;	/* base of internal registers */
+	bd->bi_inpfreq   = gd->inp_clk;
+	bd->bi_pcifreq   = gd->pci_clk;
+	bd->bi_vcofreq   = gd->vco_clk;
+	bd->bi_pevfreq   = gd->pev_clk;
+	bd->bi_flbfreq   = gd->flb_clk;
+
+	/* store bootparam to sram (backward compatible), here? */
+	{
+		u32 *sram = (u32 *)CFG_SRAM_BASE;
+		*sram++ = gd->ram_size;
+		*sram++ = gd->bus_clk;
+		*sram++ = gd->inp_clk;
+		*sram++ = gd->cpu_clk;
+		*sram++ = gd->vco_clk;
+		*sram++ = gd->flb_clk;
+		*sram++ = 0xb8c3ba11;  /* boot signature */
+	}
+#endif
+
+	bd->bi_bootflags = bootflag;	/* boot / reboot flag (for LynxOS)    */
+
+	WATCHDOG_RESET ();
+	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
+	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
+#if defined(CONFIG_CPM2)
+	bd->bi_cpmfreq = gd->cpm_clk;
+	bd->bi_brgfreq = gd->brg_clk;
+	bd->bi_sccfreq = gd->scc_clk;
+	bd->bi_vco     = gd->vco_out;
+#endif /* CONFIG_CPM2 */
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_ipbfreq = gd->ipb_clk;
+	bd->bi_pcifreq = gd->pci_clk;
+#endif /* CONFIG_MPC5xxx */
+	bd->bi_baudrate = gd->baudrate;	/* Console Baudrate     */
+
+#ifdef CFG_EXTBDINFO
+	strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
+	strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
+
+	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
+	bd->bi_plb_busfreq = gd->bus_clk;
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+	bd->bi_pci_busfreq = get_PCI_freq ();
+	bd->bi_opbfreq = get_OPB_freq ();
+#elif defined(CONFIG_XILINX_ML300)
+	bd->bi_pci_busfreq = get_PCI_freq ();
+#endif
+#endif
+
+	debug ("New Stack Pointer is: %08lx\n", addr_sp);
+
+	WATCHDOG_RESET ();
+
+#ifdef CONFIG_POST
+	post_bootmode_init();
+	post_run (NULL, POST_ROM | post_bootmode_get(0));
+#endif
+
+	WATCHDOG_RESET();
+
+	memcpy (id, (void *)gd, sizeof (gd_t));
+
+	relocate_code (addr_sp, id, addr);
+
+	/* NOTREACHED - relocate_code() does not return */
+}
+
+/************************************************************************
+ *
+ * This is the next part if the initialization sequence: we are now
+ * running from RAM and have a "normal" C environment, i. e. global
+ * data can be written, BSS has been cleared, the stack size in not
+ * that critical any more, etc.
+ *
+ ************************************************************************
+ */
+void board_init_r (gd_t *id, ulong dest_addr)
+{
+	cmd_tbl_t *cmdtp;
+	char *s, *e;
+	bd_t *bd;
+	int i;
+	extern void malloc_bin_reloc (void);
+#ifndef CFG_ENV_IS_NOWHERE
+	extern char * env_name_spec;
+#endif
+
+#ifndef CFG_NO_FLASH
+	ulong flash_size;
+#endif
+
+	gd = id;		/* initialize RAM version of global data */
+	bd = gd->bd;
+
+	gd->flags |= GD_FLG_RELOC;	/* tell others: relocation done */
+	gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
+
+#ifdef CONFIG_SERIAL_MULTI
+	serial_initialize();
+#endif
+
+	debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
+
+	WATCHDOG_RESET ();
+
+#if defined(CONFIG_BOARD_EARLY_INIT_R)
+	board_early_init_r ();
+#endif
+
+	monitor_flash_len = (ulong)&__init_end - dest_addr;
+
+	/*
+	 * We have to relocate the command table manually
+	 */
+	for (cmdtp = &__u_boot_cmd_start; cmdtp !=  &__u_boot_cmd_end; cmdtp++) {
+		ulong addr;
+		addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
+		cmdtp->cmd =
+			(int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
+
+		addr = (ulong)(cmdtp->name) + gd->reloc_off;
+		cmdtp->name = (char *)addr;
+
+		if (cmdtp->usage) {
+			addr = (ulong)(cmdtp->usage) + gd->reloc_off;
+			cmdtp->usage = (char *)addr;
+		}
+#ifdef	CFG_LONGHELP
+		if (cmdtp->help) {
+			addr = (ulong)(cmdtp->help) + gd->reloc_off;
+			cmdtp->help = (char *)addr;
+		}
+#endif
+	}
+	/* there are some other pointer constants we must deal with */
+#ifndef CFG_ENV_IS_NOWHERE
+	env_name_spec += gd->reloc_off;
+#endif
+
+	WATCHDOG_RESET ();
+
+#ifdef CONFIG_LOGBUFFER
+	logbuff_init_ptrs ();
+#endif
+#ifdef CONFIG_POST
+	post_output_backlog ();
+	post_reloc ();
+#endif
+
+	WATCHDOG_RESET();
+
+#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
+	defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
+	icache_enable ();	/* it's time to enable the instruction cache */
+#endif
+
+#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
+	unlock_ram_in_cache();	/* it's time to unlock D-cache in e500 */
+#endif
+
+#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
+	/*
+	 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
+	 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
+	 * bridge there.
+	 */
+	pci_init ();
+#endif
+#if defined(CONFIG_BAB7xx)
+	/*
+	 * Initialise the ISA bridge
+	 */
+	initialise_w83c553f ();
+#endif
+
+	asm ("sync ; isync");
+
+	/*
+	 * Setup trap handlers
+	 */
+	trap_init (dest_addr);
+
+#if !defined(CFG_NO_FLASH)
+	puts ("FLASH: ");
+
+	if ((flash_size = flash_init ()) > 0) {
+# ifdef CFG_FLASH_CHECKSUM
+		print_size (flash_size, "");
+		/*
+		 * Compute and print flash CRC if flashchecksum is set to 'y'
+		 *
+		 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
+		 */
+		s = getenv ("flashchecksum");
+		if (s && (*s == 'y')) {
+			printf ("  CRC: %08lX",
+				crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
+			);
+		}
+		putc ('\n');
+# else	/* !CFG_FLASH_CHECKSUM */
+		print_size (flash_size, "\n");
+# endif /* CFG_FLASH_CHECKSUM */
+	} else {
+		puts (failed);
+		hang ();
+	}
+
+	bd->bi_flashstart = CFG_FLASH_BASE;	/* update start of FLASH memory    */
+	bd->bi_flashsize = flash_size;	/* size of FLASH memory (final value) */
+
+#if defined(CFG_UPDATE_FLASH_SIZE)
+	/* Make a update of the Memctrl. */
+	update_flash_size (flash_size);
+#endif
+
+
+# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
+	/* flash mapped at end of memory map */
+	bd->bi_flashoffset = TEXT_BASE + flash_size;
+# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
+	bd->bi_flashoffset = monitor_flash_len;	/* reserved area for startup monitor  */
+# else
+	bd->bi_flashoffset = 0;
+# endif
+#else	/* CFG_NO_FLASH */
+
+	bd->bi_flashsize = 0;
+	bd->bi_flashstart = 0;
+	bd->bi_flashoffset = 0;
+#endif /* !CFG_NO_FLASH */
+
+	WATCHDOG_RESET ();
+
+	/* initialize higher level parts of CPU like time base and timers */
+	cpu_init_r ();
+
+	WATCHDOG_RESET ();
+
+	/* initialize malloc() area */
+	mem_malloc_init ();
+	malloc_bin_reloc ();
+
+#ifdef CONFIG_SPI
+# if !defined(CFG_ENV_IS_IN_EEPROM)
+	spi_init_f ();
+# endif
+	spi_init_r ();
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+	WATCHDOG_RESET ();
+	puts ("NAND:  ");
+	nand_init();		/* go init the NAND */
+#endif
+
+	/* relocate environment function pointers etc. */
+	env_relocate ();
+
+	/*
+	 * Fill in missing fields of bd_info.
+	 * We do this here, where we have "normal" access to the
+	 * environment; we used to do this still running from ROM,
+	 * where had to use getenv_r(), which can be pretty slow when
+	 * the environment is in EEPROM.
+	 */
+
+#if defined(CFG_EXTBDINFO)
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+#if defined(CONFIG_I2CFAST)
+	/*
+	 * set bi_iic_fast for linux taking environment variable
+	 * "i2cfast" into account
+	 */
+	{
+		char *s = getenv ("i2cfast");
+		if (s && ((*s == 'y') || (*s == 'Y'))) {
+			bd->bi_iic_fast[0] = 1;
+			bd->bi_iic_fast[1] = 1;
+		} else {
+			bd->bi_iic_fast[0] = 0;
+			bd->bi_iic_fast[1] = 0;
+		}
+	}
+#else
+	bd->bi_iic_fast[0] = 0;
+	bd->bi_iic_fast[1] = 0;
+#endif	/* CONFIG_I2CFAST */
+#endif	/* CONFIG_405GP, CONFIG_405EP */
+#endif	/* CFG_EXTBDINFO */
+
+	s = getenv ("ethaddr");
+#if defined (CONFIG_MBX) || \
+    defined (CONFIG_RPXCLASSIC) || \
+    defined(CONFIG_IAD210) || \
+    defined(CONFIG_V38B)
+	if (s == NULL)
+		board_get_enetaddr (bd->bi_enetaddr);
+	else
+#endif
+		for (i = 0; i < 6; ++i) {
+			bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+			if (s)
+				s = (*e) ? e + 1 : e;
+		}
+#ifdef	CONFIG_HERMES
+	if ((gd->board_type >> 16) == 2)
+		bd->bi_ethspeed = gd->board_type & 0xFFFF;
+	else
+		bd->bi_ethspeed = 0xFFFF;
+#endif
+
+#ifdef CONFIG_NX823
+	load_sernum_ethaddr ();
+#endif
+
+#ifdef CONFIG_HAS_ETH1
+	/* handle the 2nd ethernet address */
+
+	s = getenv ("eth1addr");
+
+	for (i = 0; i < 6; ++i) {
+		bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+		if (s)
+			s = (*e) ? e + 1 : e;
+	}
+#endif
+#ifdef CONFIG_HAS_ETH2
+	/* handle the 3rd ethernet address */
+
+	s = getenv ("eth2addr");
+#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
+	if (s == NULL)
+		board_get_enetaddr(bd->bi_enet2addr);
+	else
+#endif
+	for (i = 0; i < 6; ++i) {
+		bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+		if (s)
+			s = (*e) ? e + 1 : e;
+	}
+#endif
+
+#ifdef CONFIG_HAS_ETH3
+	/* handle 4th ethernet address */
+	s = getenv("eth3addr");
+#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
+	if (s == NULL)
+		board_get_enetaddr(bd->bi_enet3addr);
+	else
+#endif
+	for (i = 0; i < 6; ++i) {
+		bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+		if (s)
+			s = (*e) ? e + 1 : e;
+	}
+#endif
+
+#ifdef CFG_ID_EEPROM
+	mac_read_from_eeprom();
+#endif
+
+#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
+    defined(CONFIG_TQM8272) || \
+    defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
+	load_sernum_ethaddr ();
+#endif
+	/* IP Address */
+	bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
+
+	WATCHDOG_RESET ();
+
+#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
+	/*
+	 * Do pci configuration
+	 */
+	pci_init ();
+#endif
+
+/** leave this here (after malloc(), environment and PCI are working) **/
+	/* Initialize devices */
+	devices_init ();
+
+	/* Initialize the jump table for applications */
+	jumptable_init ();
+
+	/* Initialize the console (after the relocation and devices init) */
+	console_init_r ();
+
+#if defined(CONFIG_CCM)		|| \
+    defined(CONFIG_COGENT)	|| \
+    defined(CONFIG_CPCI405)	|| \
+    defined(CONFIG_EVB64260)	|| \
+    defined(CONFIG_KUP4K)	|| \
+    defined(CONFIG_KUP4X)	|| \
+    defined(CONFIG_LWMON)	|| \
+    defined(CONFIG_PCU_E)	|| \
+    defined(CONFIG_W7O)		|| \
+    defined(CONFIG_MISC_INIT_R)
+	/* miscellaneous platform dependent initialisations */
+	misc_init_r ();
+#endif
+
+#ifdef	CONFIG_HERMES
+	if (bd->bi_ethspeed != 0xFFFF)
+		hermes_start_lxt980 ((int) bd->bi_ethspeed);
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+	WATCHDOG_RESET ();
+	puts ("KGDB:  ");
+	kgdb_init ();
+#endif
+
+	debug ("U-Boot relocated to %08lx\n", dest_addr);
+
+	/*
+	 * Enable Interrupts
+	 */
+	interrupt_init ();
+
+	/* Must happen after interrupts are initialized since
+	 * an irq handler gets installed
+	 */
+#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
+	serial_buffered_init();
+#endif
+
+#ifdef CONFIG_STATUS_LED
+	status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
+#endif
+
+	udelay (20);
+
+	set_timer (0);
+
+	/* Initialize from environment */
+	if ((s = getenv ("loadaddr")) != NULL) {
+		load_addr = simple_strtoul (s, NULL, 16);
+	}
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+	if ((s = getenv ("bootfile")) != NULL) {
+		copy_filename (BootFile, s, sizeof (BootFile));
+	}
+#endif /* CFG_CMD_NET */
+
+	WATCHDOG_RESET ();
+
+#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+	WATCHDOG_RESET ();
+	puts ("SCSI:  ");
+	scsi_init ();
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+	WATCHDOG_RESET ();
+	puts ("DOC:   ");
+	doc_init ();
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_NET_MULTI)
+	WATCHDOG_RESET ();
+	puts ("Net:   ");
+#endif
+	eth_initialize (bd);
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
+    defined(CONFIG_CCM)		|| \
+    defined(CONFIG_ELPT860)	|| \
+    defined(CONFIG_EP8260)	|| \
+    defined(CONFIG_IP860)	|| \
+    defined(CONFIG_IVML24)	|| \
+    defined(CONFIG_IVMS8)	|| \
+    defined(CONFIG_MPC8260ADS)	|| \
+    defined(CONFIG_MPC8266ADS)	|| \
+    defined(CONFIG_MPC8560ADS)	|| \
+    defined(CONFIG_PCU_E)	|| \
+    defined(CONFIG_RPXSUPER)	|| \
+    defined(CONFIG_STXGP3)	|| \
+    defined(CONFIG_SPD823TS)	|| \
+    defined(CONFIG_RESET_PHY_R)	)
+
+	WATCHDOG_RESET ();
+	debug ("Reset Ethernet PHY\n");
+	reset_phy ();
+#endif
+
+#ifdef CONFIG_POST
+	post_run (NULL, POST_RAM | post_bootmode_get(0));
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
+	WATCHDOG_RESET ();
+	puts ("PCMCIA:");
+	pcmcia_init ();
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+	WATCHDOG_RESET ();
+# ifdef	CONFIG_IDE_8xx_PCCARD
+	puts ("PCMCIA:");
+# else
+	puts ("IDE:   ");
+#endif
+	ide_init ();
+#endif /* CFG_CMD_IDE */
+
+#ifdef CONFIG_LAST_STAGE_INIT
+	WATCHDOG_RESET ();
+	/*
+	 * Some parts can be only initialized if all others (like
+	 * Interrupts) are up and running (i.e. the PC-style ISA
+	 * keyboard).
+	 */
+	last_stage_init ();
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+	WATCHDOG_RESET ();
+	bedbug_init ();
+#endif
+
+#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+	/*
+	 * Export available size of memory for Linux,
+	 * taking into account the protected RAM at top of memory
+	 */
+	{
+		ulong pram;
+		uchar memsz[32];
+#ifdef CONFIG_PRAM
+		char *s;
+
+		if ((s = getenv ("pram")) != NULL) {
+			pram = simple_strtoul (s, NULL, 10);
+		} else {
+			pram = CONFIG_PRAM;
+		}
+#else
+		pram=0;
+#endif
+#ifdef CONFIG_LOGBUFFER
+		/* Also take the logbuffer into account (pram is in kB) */
+		pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
+#endif
+		sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
+		setenv ("mem", (char *)memsz);
+	}
+#endif
+
+#ifdef CONFIG_PS2KBD
+	puts ("PS/2:  ");
+	kbd_init();
+#endif
+
+	/* Initialization complete - start the monitor */
+
+	/* main_loop() can return to retry autoboot, if so just run it again. */
+	for (;;) {
+		WATCHDOG_RESET ();
+		main_loop ();
+	}
+
+	/* NOTREACHED - no way out of command loop except booting */
+}
+
+void hang (void)
+{
+	puts ("### ERROR ### Please RESET the board ###\n");
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+	show_boot_progress(-30);
+#endif
+	for (;;);
+}
diff --git a/arch/ppc/cache.c b/arch/ppc/cache.c
new file mode 100644
index 0000000000..a81ab5e363
--- /dev/null
+++ b/arch/ppc/cache.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+void flush_cache (ulong start_addr, ulong size)
+{
+#ifndef CONFIG_5xx
+	ulong addr, end_addr = start_addr + size;
+
+	if (CFG_CACHELINE_SIZE) {
+		addr = start_addr & (CFG_CACHELINE_SIZE - 1);
+		for (addr = start_addr;
+		     addr < end_addr;
+		     addr += CFG_CACHELINE_SIZE) {
+			asm ("dcbst 0,%0": :"r" (addr));
+		}
+		asm ("sync");	/* Wait for all dcbst to complete on bus */
+
+		for (addr = start_addr;
+		     addr < end_addr;
+		     addr += CFG_CACHELINE_SIZE) {
+			asm ("icbi 0,%0": :"r" (addr));
+		}
+	}
+	asm ("sync");		/* Always flush prefetch queue in any case */
+	asm ("isync");
+#endif
+}
diff --git a/arch/ppc/extable.c b/arch/ppc/extable.c
new file mode 100644
index 0000000000..d92f14270e
--- /dev/null
+++ b/arch/ppc/extable.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+	unsigned long insn, fixup;
+};
+
+extern const struct exception_table_entry __start___ex_table[];
+extern const struct exception_table_entry __stop___ex_table[];
+
+static inline unsigned long
+search_one_table(const struct exception_table_entry *first,
+		 const struct exception_table_entry *last,
+		 unsigned long value)
+{
+	while (first <= last) {
+		const struct exception_table_entry *mid;
+		long diff;
+
+		mid = (last - first) / 2 + first;
+		diff = mid->insn - value;
+		if (diff == 0)
+			return mid->fixup;
+		else if (diff < 0)
+			first = mid+1;
+		else
+			last = mid-1;
+	}
+	return 0;
+}
+
+int	ex_tab_message = 1;
+
+unsigned long
+search_exception_table(unsigned long addr)
+{
+	unsigned long ret;
+
+	/* There is only the kernel to search.  */
+	ret = search_one_table(__start___ex_table, __stop___ex_table-1, addr);
+	if (ex_tab_message)
+		printf("Bus Fault @ 0x%08lx, fixup 0x%08lx\n", addr, ret);
+	if (ret) return ret;
+
+	return 0;
+}
diff --git a/arch/ppc/interrupts.c b/arch/ppc/interrupts.c
new file mode 100644
index 0000000000..b803952bad
--- /dev/null
+++ b/arch/ppc/interrupts.c
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003
+ * Gleb Natapov <gnatapov@mrv.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <watchdog.h>
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#endif
+
+#ifdef CONFIG_SHOW_ACTIVITY
+	extern void board_show_activity (ulong);
+#endif /* CONFIG_SHOW_ACTIVITY */
+
+#ifndef CFG_WATCHDOG_FREQ
+#define CFG_WATCHDOG_FREQ (CFG_HZ / 2)
+#endif
+
+extern int interrupt_init_cpu (unsigned *);
+extern void timer_interrupt_cpu (struct pt_regs *);
+
+static unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
+
+static __inline__ unsigned long get_msr (void)
+{
+	unsigned long msr;
+
+	asm volatile ("mfmsr %0":"=r" (msr):);
+
+	return msr;
+}
+
+static __inline__ void set_msr (unsigned long msr)
+{
+	asm volatile ("mtmsr %0"::"r" (msr));
+}
+
+static __inline__ unsigned long get_dec (void)
+{
+	unsigned long val;
+
+	asm volatile ("mfdec %0":"=r" (val):);
+
+	return val;
+}
+
+
+static __inline__ void set_dec (unsigned long val)
+{
+	if (val)
+		asm volatile ("mtdec %0"::"r" (val));
+}
+
+
+void enable_interrupts (void)
+{
+	set_msr (get_msr () | MSR_EE);
+}
+
+/* returns flag if MSR_EE was set before */
+int disable_interrupts (void)
+{
+	ulong msr = get_msr ();
+
+	set_msr (msr & ~MSR_EE);
+	return ((msr & MSR_EE) != 0);
+}
+
+int interrupt_init (void)
+{
+	int ret;
+
+	/* call cpu specific function from $(CPU)/interrupts.c */
+	ret = interrupt_init_cpu (&decrementer_count);
+
+	if (ret)
+		return ret;
+
+	set_dec (decrementer_count);
+
+	set_msr (get_msr () | MSR_EE);
+
+	return (0);
+}
+
+static volatile ulong timestamp = 0;
+
+void timer_interrupt (struct pt_regs *regs)
+{
+	/* call cpu specific function from $(CPU)/interrupts.c */
+	timer_interrupt_cpu (regs);
+
+	/* Restore Decrementer Count */
+	set_dec (decrementer_count);
+
+	timestamp++;
+
+#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
+	if ((timestamp % (CFG_WATCHDOG_FREQ)) == 0)
+		WATCHDOG_RESET ();
+#endif    /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
+
+#ifdef CONFIG_STATUS_LED
+	status_led_tick (timestamp);
+#endif /* CONFIG_STATUS_LED */
+
+#ifdef CONFIG_SHOW_ACTIVITY
+	board_show_activity (timestamp);
+#endif /* CONFIG_SHOW_ACTIVITY */
+}
+
+void reset_timer (void)
+{
+	timestamp = 0;
+}
+
+ulong get_timer (ulong base)
+{
+	return (timestamp - base);
+}
+
+void set_timer (ulong t)
+{
+	timestamp = t;
+}
diff --git a/arch/ppc/kgdb.c b/arch/ppc/kgdb.c
new file mode 100644
index 0000000000..d00edcc9bb
--- /dev/null
+++ b/arch/ppc/kgdb.c
@@ -0,0 +1,323 @@
+#include <common.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+
+#include <kgdb.h>
+#include <asm/signal.h>
+#include <asm/processor.h>
+
+#define PC_REGNUM 64
+#define SP_REGNUM 1
+
+void breakinst(void);
+
+int
+kgdb_setjmp(long *buf)
+{
+	asm ("mflr 0; stw 0,0(%0);"
+	     "stw 1,4(%0); stw 2,8(%0);"
+	     "mfcr 0; stw 0,12(%0);"
+	     "stmw 13,16(%0)"
+	     : : "r" (buf));
+	/* XXX should save fp regs as well */
+	return 0;
+}
+
+void
+kgdb_longjmp(long *buf, int val)
+{
+	if (val == 0)
+		val = 1;
+	asm ("lmw 13,16(%0);"
+	     "lwz 0,12(%0); mtcrf 0x38,0;"
+	     "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
+	     "mtlr 0; mr 3,%1"
+	     : : "r" (buf), "r" (val));
+}
+
+static inline unsigned long
+get_msr(void)
+{
+	unsigned long msr;
+	asm volatile("mfmsr %0" : "=r" (msr):);
+	return msr;
+}
+
+static inline void
+set_msr(unsigned long msr)
+{
+	asm volatile("mtmsr %0" : : "r" (msr));
+}
+
+/* Convert the SPARC hardware trap type code to a unix signal number. */
+/*
+ * This table contains the mapping between PowerPC hardware trap types, and
+ * signals, which are primarily what GDB understands.
+ */
+static struct hard_trap_info
+{
+	unsigned int tt;		/* Trap type code for powerpc */
+	unsigned char signo;		/* Signal that we map this trap into */
+} hard_trap_info[] = {
+	{ 0x200, SIGSEGV },			/* machine check */
+	{ 0x300, SIGSEGV },			/* address error (store) */
+	{ 0x400, SIGBUS },			/* instruction bus error */
+	{ 0x500, SIGINT },			/* interrupt */
+	{ 0x600, SIGBUS },			/* alingment */
+	{ 0x700, SIGTRAP },			/* breakpoint trap */
+	{ 0x800, SIGFPE },			/* fpu unavail */
+	{ 0x900, SIGALRM },			/* decrementer */
+	{ 0xa00, SIGILL },			/* reserved */
+	{ 0xb00, SIGILL },			/* reserved */
+	{ 0xc00, SIGCHLD },			/* syscall */
+	{ 0xd00, SIGTRAP },			/* single-step/watch */
+	{ 0xe00, SIGFPE },			/* fp assist */
+	{ 0, 0}				/* Must be last */
+};
+
+static int
+computeSignal(unsigned int tt)
+{
+	struct hard_trap_info *ht;
+
+	for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
+		if (ht->tt == tt)
+			return ht->signo;
+
+	return SIGHUP;         /* default for things we don't know about */
+}
+
+void
+kgdb_enter(struct pt_regs *regs, kgdb_data *kdp)
+{
+	unsigned long msr;
+
+	kdp->private[0] = msr = get_msr();
+	set_msr(msr & ~MSR_EE);	/* disable interrupts */
+
+	if (regs->nip == (unsigned long)breakinst) {
+		/* Skip over breakpoint trap insn */
+		regs->nip += 4;
+	}
+	regs->msr &= ~MSR_SE;
+
+	/* reply to host that an exception has occurred */
+	kdp->sigval = computeSignal(regs->trap);
+
+	kdp->nregs = 2;
+
+	kdp->regs[0].num = PC_REGNUM;
+	kdp->regs[0].val = regs->nip;
+
+	kdp->regs[1].num = SP_REGNUM;
+	kdp->regs[1].val = regs->gpr[SP_REGNUM];
+}
+
+void
+kgdb_exit(struct pt_regs *regs, kgdb_data *kdp)
+{
+	unsigned long msr = kdp->private[0];
+
+	if (kdp->extype & KGDBEXIT_WITHADDR)
+		regs->nip = kdp->exaddr;
+
+	switch (kdp->extype & KGDBEXIT_TYPEMASK) {
+
+	case KGDBEXIT_KILL:
+	case KGDBEXIT_CONTINUE:
+		set_msr(msr);
+		break;
+
+	case KGDBEXIT_SINGLE:
+		regs->msr |= MSR_SE;
+		break;
+	}
+}
+
+int
+kgdb_trap(struct pt_regs *regs)
+{
+	return (regs->trap);
+}
+
+/* return the value of the CPU registers.
+ * some of them are non-PowerPC names :(
+ * they are stored in gdb like:
+ * struct {
+ *     u32 gpr[32];
+ *     f64 fpr[32];
+ *     u32 pc, ps, cnd, lr; (ps=msr)
+ *     u32 cnt, xer, mq;
+ * }
+ */
+
+#define SPACE_REQUIRED	((32*4)+(32*8)+(6*4))
+
+#ifdef CONFIG_8260
+/* store floating double indexed */
+#define STFDI(n,p)	__asm__ __volatile__ ("stfd " #n ",%0" : "=o"(p[2*n]))
+/* store floating double multiple */
+#define STFDM(p)	{ STFDI( 0,p); STFDI( 1,p); STFDI( 2,p); STFDI( 3,p); \
+			  STFDI( 4,p); STFDI( 5,p); STFDI( 6,p); STFDI( 7,p); \
+			  STFDI( 8,p); STFDI( 9,p); STFDI(10,p); STFDI(11,p); \
+			  STFDI(12,p); STFDI(13,p); STFDI(14,p); STFDI(15,p); \
+			  STFDI(16,p); STFDI(17,p); STFDI(18,p); STFDI(19,p); \
+			  STFDI(20,p); STFDI(21,p); STFDI(22,p); STFDI(23,p); \
+			  STFDI(24,p); STFDI(25,p); STFDI(26,p); STFDI(27,p); \
+			  STFDI(28,p); STFDI(29,p); STFDI(30,p); STFDI(31,p); }
+#endif
+
+int
+kgdb_getregs(struct pt_regs *regs, char *buf, int max)
+{
+	int i;
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (max < SPACE_REQUIRED)
+		kgdb_error(KGDBERR_NOSPACE);
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	/* General Purpose Regs */
+	for (i = 0; i < 32; i++)
+		*ptr++ = regs->gpr[i];
+
+	/* Floating Point Regs */
+#ifdef CONFIG_8260
+	STFDM(ptr);
+	ptr += 32*2;
+#else
+	for (i = 0; i < 32; i++) {
+		*ptr++ = 0;
+		*ptr++ = 0;
+	}
+#endif
+
+	/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
+	*ptr++ = regs->nip;
+	*ptr++ = regs->msr;
+	*ptr++ = regs->ccr;
+	*ptr++ = regs->link;
+	*ptr++ = regs->ctr;
+	*ptr++ = regs->xer;
+
+	return (SPACE_REQUIRED);
+}
+
+/* set the value of the CPU registers */
+
+#ifdef CONFIG_8260
+/* load floating double */
+#define LFD(n,v)	__asm__ __volatile__ ("lfd " #n ",%0" :: "o"(v))
+/* load floating double indexed */
+#define LFDI(n,p)	__asm__ __volatile__ ("lfd " #n ",%0" :: "o"((p)[2*n]))
+/* load floating double multiple */
+#define LFDM(p)		{ LFDI( 0,p); LFDI( 1,p); LFDI( 2,p); LFDI( 3,p); \
+			  LFDI( 4,p); LFDI( 5,p); LFDI( 6,p); LFDI( 7,p); \
+			  LFDI( 8,p); LFDI( 9,p); LFDI(10,p); LFDI(11,p); \
+			  LFDI(12,p); LFDI(13,p); LFDI(14,p); LFDI(15,p); \
+			  LFDI(16,p); LFDI(17,p); LFDI(18,p); LFDI(19,p); \
+			  LFDI(20,p); LFDI(21,p); LFDI(22,p); LFDI(23,p); \
+			  LFDI(24,p); LFDI(25,p); LFDI(26,p); LFDI(27,p); \
+			  LFDI(28,p); LFDI(29,p); LFDI(30,p); LFDI(31,p); }
+#endif
+
+void
+kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length)
+{
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (regno < 0 || regno >= 70)
+		kgdb_error(KGDBERR_BADPARAMS);
+	else if (regno >= 32 && regno < 64) {
+		if (length < 8)
+			kgdb_error(KGDBERR_NOSPACE);
+	}
+	else {
+		if (length < 4)
+			kgdb_error(KGDBERR_NOSPACE);
+	}
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	if (regno >= 0 && regno < 32)
+		regs->gpr[regno] = *ptr;
+	else switch (regno) {
+
+#ifdef CONFIG_8260
+#define caseF(n) \
+	case (n) + 32:	LFD(n, *ptr);		break;
+
+caseF( 0) caseF( 1) caseF( 2) caseF( 3) caseF( 4) caseF( 5) caseF( 6) caseF( 7)
+caseF( 8) caseF( 9) caseF(10) caseF(11) caseF(12) caseF(13) caseF(14) caseF(15)
+caseF(16) caseF(17) caseF(18) caseF(19) caseF(20) caseF(21) caseF(22) caseF(23)
+caseF(24) caseF(25) caseF(26) caseF(27) caseF(28) caseF(29) caseF(30) caseF(31)
+
+#undef caseF
+#endif
+
+	case 64:	regs->nip = *ptr;	break;
+	case 65:	regs->msr = *ptr;	break;
+	case 66:	regs->ccr = *ptr;	break;
+	case 67:	regs->link = *ptr;	break;
+	case 68:	regs->ctr = *ptr;	break;
+	case 69:	regs->ctr = *ptr;	break;
+
+	default:
+		kgdb_error(KGDBERR_BADPARAMS);
+	}
+}
+
+void
+kgdb_putregs(struct pt_regs *regs, char *buf, int length)
+{
+	int i;
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (length < SPACE_REQUIRED)
+		kgdb_error(KGDBERR_NOSPACE);
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	/*
+	 * If the stack pointer has moved, you should pray.
+	 * (cause only god can help you).
+	 */
+
+	/* General Purpose Regs */
+	for (i = 0; i < 32; i++)
+		regs->gpr[i] = *ptr++;
+
+	/* Floating Point Regs */
+#ifdef CONFIG_8260
+	LFDM(ptr);
+#endif
+	ptr += 32*2;
+
+	/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
+	regs->nip = *ptr++;
+	regs->msr = *ptr++;
+	regs->ccr = *ptr++;
+	regs->link = *ptr++;
+	regs->ctr = *ptr++;
+	regs->xer = *ptr++;
+}
+
+/* This function will generate a breakpoint exception.  It is used at the
+   beginning of a program to sync up with a debugger and can be used
+   otherwise as a quick means to stop program execution and "break" into
+   the debugger. */
+
+void
+kgdb_breakpoint(int argc, char *argv[])
+{
+	asm("	.globl breakinst\n\
+	     breakinst: .long 0x7d821008\n\
+	    ");
+}
+
+#endif /* CFG_CMD_KGDB */
diff --git a/arch/ppc/ppcstring.S b/arch/ppc/ppcstring.S
new file mode 100644
index 0000000000..97023a0555
--- /dev/null
+++ b/arch/ppc/ppcstring.S
@@ -0,0 +1,216 @@
+/*
+ * String handling functions for PowerPC.
+ *
+ * Copyright (C) 1996 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <ppc_asm.tmpl>
+#include <asm/errno.h>
+
+	.globl	strcpy
+strcpy:
+	addi	r5,r3,-1
+	addi	r4,r4,-1
+1:	lbzu	r0,1(r4)
+	cmpwi	0,r0,0
+	stbu	r0,1(r5)
+	bne	1b
+	blr
+
+	.globl	strncpy
+strncpy:
+	cmpwi	0,r5,0
+	beqlr
+	mtctr	r5
+	addi	r6,r3,-1
+	addi	r4,r4,-1
+1:	lbzu	r0,1(r4)
+	cmpwi	0,r0,0
+	stbu	r0,1(r6)
+	bdnzf	2,1b		/* dec ctr, branch if ctr != 0 && !cr0.eq */
+	blr
+
+	.globl	strcat
+strcat:
+	addi	r5,r3,-1
+	addi	r4,r4,-1
+1:	lbzu	r0,1(r5)
+	cmpwi	0,r0,0
+	bne	1b
+	addi	r5,r5,-1
+1:	lbzu	r0,1(r4)
+	cmpwi	0,r0,0
+	stbu	r0,1(r5)
+	bne	1b
+	blr
+
+	.globl	strcmp
+strcmp:
+	addi	r5,r3,-1
+	addi	r4,r4,-1
+1:	lbzu	r3,1(r5)
+	cmpwi	1,r3,0
+	lbzu	r0,1(r4)
+	subf.	r3,r0,r3
+	beqlr	1
+	beq	1b
+	blr
+
+	.globl	strlen
+strlen:
+	addi	r4,r3,-1
+1:	lbzu	r0,1(r4)
+	cmpwi	0,r0,0
+	bne	1b
+	subf	r3,r3,r4
+	blr
+
+	.globl	memset
+memset:
+	rlwimi	r4,r4,8,16,23
+	rlwimi	r4,r4,16,0,15
+	addi	r6,r3,-4
+	cmplwi	0,r5,4
+	blt	7f
+	stwu	r4,4(r6)
+	beqlr
+	andi.	r0,r6,3
+	add	r5,r0,r5
+	subf	r6,r0,r6
+	rlwinm	r0,r5,32-2,2,31
+	mtctr	r0
+	bdz	6f
+1:	stwu	r4,4(r6)
+	bdnz	1b
+6:	andi.	r5,r5,3
+7:	cmpwi	0,r5,0
+	beqlr
+	mtctr	r5
+	addi	r6,r6,3
+8:	stbu	r4,1(r6)
+	bdnz	8b
+	blr
+
+	.globl	bcopy
+bcopy:
+	mr	r6,r3
+	mr	r3,r4
+	mr	r4,r6
+	b	memcpy
+
+	.globl	memmove
+memmove:
+	cmplw	0,r3,r4
+	bgt	backwards_memcpy
+	/* fall through */
+
+	.globl	memcpy
+memcpy:
+	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
+	addi	r6,r3,-4
+	addi	r4,r4,-4
+	beq	2f			/* if less than 8 bytes to do */
+	andi.	r0,r6,3			/* get dest word aligned */
+	mtctr	r7
+	bne	5f
+1:	lwz	r7,4(r4)
+	lwzu	r8,8(r4)
+	stw	r7,4(r6)
+	stwu	r8,8(r6)
+	bdnz	1b
+	andi.	r5,r5,7
+2:	cmplwi	0,r5,4
+	blt	3f
+	lwzu	r0,4(r4)
+	addi	r5,r5,-4
+	stwu	r0,4(r6)
+3:	cmpwi	0,r5,0
+	beqlr
+	mtctr	r5
+	addi	r4,r4,3
+	addi	r6,r6,3
+4:	lbzu	r0,1(r4)
+	stbu	r0,1(r6)
+	bdnz	4b
+	blr
+5:	subfic	r0,r0,4
+	mtctr	r0
+6:	lbz	r7,4(r4)
+	addi	r4,r4,1
+	stb	r7,4(r6)
+	addi	r6,r6,1
+	bdnz	6b
+	subf	r5,r0,r5
+	rlwinm.	r7,r5,32-3,3,31
+	beq	2b
+	mtctr	r7
+	b	1b
+
+	.globl	backwards_memcpy
+backwards_memcpy:
+	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
+	add	r6,r3,r5
+	add	r4,r4,r5
+	beq	2f
+	andi.	r0,r6,3
+	mtctr	r7
+	bne	5f
+1:	lwz	r7,-4(r4)
+	lwzu	r8,-8(r4)
+	stw	r7,-4(r6)
+	stwu	r8,-8(r6)
+	bdnz	1b
+	andi.	r5,r5,7
+2:	cmplwi	0,r5,4
+	blt	3f
+	lwzu	r0,-4(r4)
+	subi	r5,r5,4
+	stwu	r0,-4(r6)
+3:	cmpwi	0,r5,0
+	beqlr
+	mtctr	r5
+4:	lbzu	r0,-1(r4)
+	stbu	r0,-1(r6)
+	bdnz	4b
+	blr
+5:	mtctr	r0
+6:	lbzu	r7,-1(r4)
+	stbu	r7,-1(r6)
+	bdnz	6b
+	subf	r5,r0,r5
+	rlwinm.	r7,r5,32-3,3,31
+	beq	2b
+	mtctr	r7
+	b	1b
+
+	.globl	memcmp
+memcmp:
+	cmpwi	0,r5,0
+	ble-	2f
+	mtctr	r5
+	addi	r6,r3,-1
+	addi	r4,r4,-1
+1:	lbzu	r3,1(r6)
+	lbzu	r0,1(r4)
+	subf.	r3,r0,r3
+	bdnzt	2,1b
+	blr
+2:	li	r3,0
+	blr
+
+	.global	memchr
+memchr:
+	cmpwi	0,r5,0
+	ble-	2f
+	mtctr	r5
+	addi	r3,r3,-1
+1:	lbzu	r0,1(r3)
+	cmpw	0,r0,r4
+	bdnzf	2,1b
+	beqlr
+2:	li	r3,0
+	blr
diff --git a/arch/ppc/ticks.S b/arch/ppc/ticks.S
new file mode 100644
index 0000000000..b8d25b7f46
--- /dev/null
+++ b/arch/ppc/ticks.S
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2000, 2001
+ * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
+ *  base on code by
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <config.h>
+#include <watchdog.h>
+
+/*
+ * unsigned long long get_ticks(void);
+ *
+ * read timebase as "long long"
+ */
+	.globl	get_ticks
+get_ticks:
+1:	mftbu	r3
+	mftb	r4
+	mftbu	r5
+	cmp	0,r3,r5
+	bne	1b
+	blr
+
+/*
+ * Delay for a number of ticks
+ */
+	.globl	wait_ticks
+wait_ticks:
+	mflr	r8		/* save link register */
+	mr	r7, r3		/* save tick count */
+	bl	get_ticks	/* Get start time */
+
+	/* Calculate end time */
+	addc    r7, r4, r7	/* Compute end time lower */
+	addze	r6, r3		/*     and end time upper */
+
+	WATCHDOG_RESET		/* Trigger watchdog, if needed */
+1:	bl	get_ticks	/* Get current time */
+	subfc	r4, r4, r7	/* Subtract current time from end time */
+	subfe.	r3, r3, r6
+	bge	1b		/* Loop until time expired */
+
+	mtlr	r8		/* restore link register */
+	blr
diff --git a/arch/ppc/time.c b/arch/ppc/time.c
new file mode 100644
index 0000000000..51e8e8406d
--- /dev/null
+++ b/arch/ppc/time.c
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2000, 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long usec)
+{
+	ulong ticks;
+
+	if (usec < 1000) {
+		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
+	} else {
+		ticks = ((usec / 10) * (get_tbclk() / 100000));
+	}
+
+	return (ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * We implement the delay by converting the delay (the number of
+ * microseconds to wait) into a number of time base ticks; then we
+ * watch the time base until it has incremented by that amount.
+ */
+void udelay(unsigned long usec)
+{
+	ulong ticks = usec2ticks (usec);
+
+	wait_ticks (ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+unsigned long ticks2usec(unsigned long ticks)
+{
+	ulong tbclk = get_tbclk();
+
+	/* usec = ticks * 1000000 / tbclk
+	 * Multiplication would overflow at ~4.2e3 ticks,
+	 * so we break it up into
+	 * usec = ( ( ticks * 1000) / tbclk ) * 1000;
+	 */
+	ticks *= 1000L;
+	ticks /= tbclk;
+	ticks *= 1000L;
+
+	return ((ulong)ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+int init_timebase (void)
+{
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx)
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+	/* unlock */
+	immap->im_sitk.sitk_tbk = KAPWR_KEY;
+#endif
+
+	/* reset */
+	asm ("li 3,0 ; mttbu 3 ; mttbl 3 ;");
+
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx)
+	/* enable */
+	immap->im_sit.sit_tbscr |= TBSCR_TBE;
+#endif
+	return (0);
+}
+/* ------------------------------------------------------------------------- */