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authorSascha Hauer <s.hauer@pengutronix.de>2014-03-07 09:25:56 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2014-03-07 09:25:56 +0100
commit7dd3401d034079dd04b41c36299e617290d0bcd6 (patch)
tree9cdca646504029e1ec49f578bacdfe69041b8bcd /arch/ppc
parent74213ed9a70f26a141ca3797e34c64f88a5cf090 (diff)
parent6a9481b28e460d2f5ebfecf8b368145e6803b67e (diff)
downloadbarebox-7dd3401d034079dd04b41c36299e617290d0bcd6.tar.gz
barebox-7dd3401d034079dd04b41c36299e617290d0bcd6.tar.xz
Merge branch 'for-next/ppc'
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/Kconfig1
-rw-r--r--arch/ppc/boards/geip-da923rc/env/bin/boot9
-rw-r--r--arch/ppc/boards/geip-da923rc/env/bin/init10
-rw-r--r--arch/ppc/configs/da923rc_defconfig4
-rw-r--r--arch/ppc/configs/p2020rdb_defconfig2
-rw-r--r--arch/ppc/cpu-85xx/Makefile1
-rw-r--r--arch/ppc/cpu-85xx/mmu.c54
-rw-r--r--arch/ppc/cpu-85xx/start.S3
-rw-r--r--arch/ppc/cpu-85xx/tlb.c17
-rw-r--r--arch/ppc/include/asm/mmu.h6
-rw-r--r--arch/ppc/lib/board.c6
-rw-r--r--arch/ppc/mach-mpc5xxx/Kconfig1
-rw-r--r--arch/ppc/mach-mpc85xx/Kconfig3
-rw-r--r--arch/ppc/mach-mpc85xx/barebox.lds.S8
-rw-r--r--arch/ppc/mach-mpc85xx/cpu.c11
-rw-r--r--arch/ppc/mach-mpc85xx/include/mach/mmu.h5
16 files changed, 127 insertions, 14 deletions
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index db269dd971..eaf60e0fe4 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -3,7 +3,6 @@ config PPC
select HAVE_CONFIGURABLE_TEXT_BASE
select HAS_KALLSYMS
select HAS_MODULES
- select HAVE_CONFIGURABLE_MEMORY_LAYOUT
select OFTREE
default y
diff --git a/arch/ppc/boards/geip-da923rc/env/bin/boot b/arch/ppc/boards/geip-da923rc/env/bin/boot
new file mode 100644
index 0000000000..ce7da18e63
--- /dev/null
+++ b/arch/ppc/boards/geip-da923rc/env/bin/boot
@@ -0,0 +1,9 @@
+#!/bin/sh
+#Load the firmware images from the NOR UBIFS file system and boot
+
+readlink /mnt/active symlink
+
+bootargs="ubi.mtd=nand root=ubi0:fs-active rootfstype=ubifs rw panic=25"
+cp /mnt/$symlink/uImage /
+cp /mnt/$symlink/dtb /
+bootm -o /dtb /uImage \ No newline at end of file
diff --git a/arch/ppc/boards/geip-da923rc/env/bin/init b/arch/ppc/boards/geip-da923rc/env/bin/init
index 330a435dd7..80cc2cffb3 100644
--- a/arch/ppc/boards/geip-da923rc/env/bin/init
+++ b/arch/ppc/boards/geip-da923rc/env/bin/init
@@ -14,3 +14,13 @@ fi
mkdir /mnt
mount -t ubifs /dev/ubi0.boot /mnt
+
+echo
+echo -n "Hit ctrl-c to stop autoboot: "
+timeout -c 5
+
+if [ $? -ne 0 ]; then
+ exit 0
+fi
+
+boot
diff --git a/arch/ppc/configs/da923rc_defconfig b/arch/ppc/configs/da923rc_defconfig
index da1b13aac7..3b5292a886 100644
--- a/arch/ppc/configs/da923rc_defconfig
+++ b/arch/ppc/configs/da923rc_defconfig
@@ -48,7 +48,7 @@ CONFIG_FS_UBIFS=y
CONFIG_FS_UBIFS_COMPRESSION_LZO=y
CONFIG_CMD_UNLZO=y
CONFIG_LZO_DECOMPRESS=y
-CONFIG_MALLOC_SIZE=0x2800000
+CONFIG_MALLOC_SIZE=0x4000000
CONFIG_PROMPT="GE> "
CONFIG_BAUDRATE=9600
CONFIG_RELOCATABLE=y
@@ -61,3 +61,5 @@ CONFIG_CMD_VERSION=n
CONFIG_OFTREE=y
CONFIG_CMD_OFTREE_PROBE=y
CONFIG_CMD_OFTREE=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_IOMEM=y
diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig
index 0f77903286..868c060fc7 100644
--- a/arch/ppc/configs/p2020rdb_defconfig
+++ b/arch/ppc/configs/p2020rdb_defconfig
@@ -32,3 +32,5 @@ CONFIG_I2C=y
CONFIG_I2C_IMX=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_IOMEM=y
diff --git a/arch/ppc/cpu-85xx/Makefile b/arch/ppc/cpu-85xx/Makefile
index 3ee039778c..c649c4ec25 100644
--- a/arch/ppc/cpu-85xx/Makefile
+++ b/arch/ppc/cpu-85xx/Makefile
@@ -1,4 +1,5 @@
obj-y += traps.o
obj-y += tlb.o
+obj-$(CONFIG_MMU) += mmu.o
extra-y += start.o
extra-y += resetvec.o
diff --git a/arch/ppc/cpu-85xx/mmu.c b/arch/ppc/cpu-85xx/mmu.c
new file mode 100644
index 0000000000..7e86e6b2b6
--- /dev/null
+++ b/arch/ppc/cpu-85xx/mmu.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2014 GE Intelligent Platforms, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/cache.h>
+#include <mach/mmu.h>
+
+void remap_range(void *_start, size_t size, uint32_t flags)
+{
+ uint32_t ptr, start, tsize, valid, wimge;
+ unsigned long epn;
+ phys_addr_t rpn = 0;
+ int esel = 0;
+
+ ptr = start = (uint32_t)_start;
+ wimge = flags | MAS2_M;
+
+ while (ptr < (start + size)) {
+ esel = e500_find_tlb_idx((void *)ptr, 1);
+ if (esel != -1)
+ break;
+ e500_read_tlbcam_entry(esel, &valid, &tsize, &epn,
+ &rpn);
+ if (flags & MAS2_I) {
+ flush_dcache();
+ invalidate_icache();
+ }
+ e500_set_tlb(1, epn, rpn, MAS3_SX|MAS3_SW|MAS3_SR,
+ (u8)wimge, 0, esel, tsize, 1);
+ /* convert tsize to bytes to increment address. */
+ ptr += (1ULL << ((tsize) + 10));
+ }
+}
+
+uint32_t mmu_get_pte_cached_flags(void)
+{
+ return 0;
+}
+
+uint32_t mmu_get_pte_uncached_flags(void)
+{
+ return MAS2_I;
+}
diff --git a/arch/ppc/cpu-85xx/start.S b/arch/ppc/cpu-85xx/start.S
index 0402cf0ed7..57f007b783 100644
--- a/arch/ppc/cpu-85xx/start.S
+++ b/arch/ppc/cpu-85xx/start.S
@@ -879,9 +879,6 @@ relocate_code:
sub r3, r3, r5
lwz r5,GOT(__init_end) /* Copy to init_end only */
sub r5,r5,r4
- lis r10, 0xffff0000@h /* Round down to 64KB */
- ori r10, r10, 0xffff0000@l
- and r3, r3, r10 /* Destination */
mr r1, r3
mr r10, r3
li r6,CACHELINE_SIZE
diff --git a/arch/ppc/cpu-85xx/tlb.c b/arch/ppc/cpu-85xx/tlb.c
index a2739d000c..3a5b413627 100644
--- a/arch/ppc/cpu-85xx/tlb.c
+++ b/arch/ppc/cpu-85xx/tlb.c
@@ -50,7 +50,22 @@ void e500_init_tlbs(void)
return ;
}
-static int e500_find_free_tlbcam(void)
+void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize,
+ unsigned long *epn, phys_addr_t *rpn)
+{
+ u32 _mas1;
+
+ mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0));
+ asm volatile("tlbre;isync");
+ _mas1 = mfspr(MAS1);
+
+ *valid = (_mas1 & MAS1_VALID);
+ *tsize = (_mas1 >> 7) & 0x1f;
+ *epn = mfspr(MAS2) & MAS2_EPN;
+ *rpn = mfspr(MAS3) & MAS3_RPN;
+}
+
+int e500_find_free_tlbcam(void)
{
int ix;
u32 _mas1;
diff --git a/arch/ppc/include/asm/mmu.h b/arch/ppc/include/asm/mmu.h
index 72233b4175..6e15975545 100644
--- a/arch/ppc/include/asm/mmu.h
+++ b/arch/ppc/include/asm/mmu.h
@@ -557,6 +557,11 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
#ifndef __ASSEMBLY__
+#ifdef CONFIG_MMU
+void remap_range(void *_start, size_t size, uint32_t flags);
+uint32_t mmu_get_pte_cached_flags(void);
+uint32_t mmu_get_pte_uncached_flags(void);
+#else
static inline void remap_range(void *_start, size_t size, uint32_t flags)
{
}
@@ -570,6 +575,7 @@ static inline uint32_t mmu_get_pte_uncached_flags(void)
{
return 0;
}
+#endif /* CONFIG_MMU */
#endif
#endif /* _PPC_MMU_H_ */
diff --git a/arch/ppc/lib/board.c b/arch/ppc/lib/board.c
index 18d2588e2c..3f13db9218 100644
--- a/arch/ppc/lib/board.c
+++ b/arch/ppc/lib/board.c
@@ -46,11 +46,7 @@ void board_init_r (ulong end_of_ram)
_text_base = end_of_ram;
#endif
- /*
- * FIXME: 128k stack size. Is this enough? should
- * it be configurable?
- */
- malloc_end = (_text_base - (128 << 10)) & ~(4095);
+ malloc_end = (_text_base - STACK_SIZE) & ~(4095);
debug("malloc_end: 0x%08lx\n", malloc_end);
debug("TEXT_BASE after relocation: 0x%08lx\n", _text_base);
diff --git a/arch/ppc/mach-mpc5xxx/Kconfig b/arch/ppc/mach-mpc5xxx/Kconfig
index 180aa32ad1..1ecce3a56c 100644
--- a/arch/ppc/mach-mpc5xxx/Kconfig
+++ b/arch/ppc/mach-mpc5xxx/Kconfig
@@ -32,6 +32,7 @@ config ARCH_MPC5200
config MPC5xxx
bool
depends on MACH_PHYCORE_MPC5200B_TINY
+ select HAVE_CONFIGURABLE_MEMORY_LAYOUT
default y
menu "Board specific settings"
diff --git a/arch/ppc/mach-mpc85xx/Kconfig b/arch/ppc/mach-mpc85xx/Kconfig
index dc2d2b7b7e..74bad76667 100644
--- a/arch/ppc/mach-mpc85xx/Kconfig
+++ b/arch/ppc/mach-mpc85xx/Kconfig
@@ -1,5 +1,8 @@
if ARCH_MPC85XX
+config MMU
+ default y if CMD_MEMTEST
+
config TEXT_BASE
hex
default 0xeff80000 if P2020RDB
diff --git a/arch/ppc/mach-mpc85xx/barebox.lds.S b/arch/ppc/mach-mpc85xx/barebox.lds.S
index 980359e3a1..87ab7acfe2 100644
--- a/arch/ppc/mach-mpc85xx/barebox.lds.S
+++ b/arch/ppc/mach-mpc85xx/barebox.lds.S
@@ -32,6 +32,8 @@ PHDRS
SECTIONS
{
. = TEXT_BASE;
+ _stext = .;
+ PROVIDE (stext = .);
.interp : { *(.interp) }
.hash : { *(.hash) }
@@ -96,8 +98,6 @@ SECTIONS
*(.dynamic*)
CONSTRUCTORS
}
- _edata = .;
- PROVIDE (edata = .);
. = .;
__barebox_cmd_start = .;
@@ -118,6 +118,9 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
+ _edata = .;
+ PROVIDE (edata = .);
+
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
@@ -130,7 +133,6 @@ SECTIONS
.bootpg RESET_VECTOR_ADDRESS - 0xffc :
{
_text = .;
- _stext = .;
arch/ppc/cpu-85xx/start.o (.bootpg)
} :text = 0xffff
diff --git a/arch/ppc/mach-mpc85xx/cpu.c b/arch/ppc/mach-mpc85xx/cpu.c
index e5c01fc8f6..7c183c1b5e 100644
--- a/arch/ppc/mach-mpc85xx/cpu.c
+++ b/arch/ppc/mach-mpc85xx/cpu.c
@@ -24,7 +24,10 @@
#include <config.h>
#include <common.h>
+#include <memory.h>
+#include <init.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm-generic/memory_layout.h>
#include <mach/mmu.h>
#include <mach/immap_85xx.h>
@@ -81,3 +84,11 @@ phys_size_t fsl_get_effective_memsize(void)
return sdram_size;
}
+
+static int fsl_reserve_region(void)
+{
+ request_sdram_region("stack", _text_base - STACK_SIZE,
+ STACK_SIZE);
+ return 0;
+}
+coredevice_initcall(fsl_reserve_region);
diff --git a/arch/ppc/mach-mpc85xx/include/mach/mmu.h b/arch/ppc/mach-mpc85xx/include/mach/mmu.h
index 00459e2d29..e2ecc62ef0 100644
--- a/arch/ppc/mach-mpc85xx/include/mach/mmu.h
+++ b/arch/ppc/mach-mpc85xx/include/mach/mmu.h
@@ -13,6 +13,11 @@
#include <asm/mmu.h>
#ifndef __ASSEMBLY__
+extern int e500_find_free_tlbcam(void);
+extern void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize,
+ unsigned long *epn, phys_addr_t *rpn);
+extern void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize,
+ unsigned long *epn, phys_addr_t *rpn);
extern void e500_set_tlb(u8 tlb, u32 epn, u64 rpn, u8 perms, u8 wimge,
u8 ts, u8 esel, u8 tsize, u8 iprot);
extern void e500_disable_tlb(u8 esel);