Merge branch 'for-next/riscv'

16 files changed, 185 insertions, 295 deletions

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 828b65a0c1..0f03637a66 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -110,6 +110,22 @@ config BOARD_BEAGLEV_BETA
 
 endif
 
+config SOC_ALLWINNER_SUN20I
+	bool "Allwinner Sun20i SoCs"
+	depends on ARCH_RV64I
+	select HAS_ASM_DEBUG_LL
+	select HAS_CACHE
+
+if SOC_ALLWINNER_SUN20I
+
+config BOARD_ALLWINNER_D1
+	bool "Allwinner D1 Nezha"
+	select RISCV_S_MODE
+	select RISCV_M_MODE
+	def_bool y
+
+endif
+
 comment "CPU features"
 
 config SIFIVE_L2
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 6fbf1d4ddd..279db046c0 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
-KBUILD_DEFCONFIG := virt64_defconfig
+KBUILD_DEFCONFIG := rv64i_defconfig
 
 KBUILD_CPPFLAGS += -fno-strict-aliasing
 
diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile
index 3b763ff308..df16d38496 100644
--- a/arch/riscv/boards/Makefile
+++ b/arch/riscv/boards/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_BOARD_ALLWINNER_D1)	+= allwinner-d1/
 obj-$(CONFIG_BOARD_ERIZO_GENERIC)	+= erizo/
 obj-$(CONFIG_BOARD_HIFIVE)		+= hifive/
 obj-$(CONFIG_BOARD_BEAGLEV)		+= beaglev/
diff --git a/arch/riscv/boards/allwinner-d1/Makefile b/arch/riscv/boards/allwinner-d1/Makefile
new file mode 100644
index 0000000000..3d217ffe0b
--- /dev/null
+++ b/arch/riscv/boards/allwinner-d1/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+pbl-y += lowlevel.o
diff --git a/arch/riscv/boards/allwinner-d1/lowlevel.c b/arch/riscv/boards/allwinner-d1/lowlevel.c
new file mode 100644
index 0000000000..2b07a81edb
--- /dev/null
+++ b/arch/riscv/boards/allwinner-d1/lowlevel.c
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <common.h>
+#include <debug_ll.h>
+#include <asm/barebox-riscv.h>
+
+#define DRAM_BASE	0x40000000
+
+ENTRY_FUNCTION(start_allwinner_d1, a0, a1, a2)
+{
+	barebox_riscv_supervisor_entry(DRAM_BASE, SZ_1G, a0, (void *)a1);
+}
diff --git a/arch/riscv/boot/entry.c b/arch/riscv/boot/entry.c
index e4a5c2208d..f5a536fc78 100644
--- a/arch/riscv/boot/entry.c
+++ b/arch/riscv/boot/entry.c
@@ -25,6 +25,7 @@ void __noreturn __naked barebox_riscv_entry(unsigned long membase,
 {
 	unsigned long stack_top = riscv_mem_stack_top(membase, membase + memsize);
 	asm volatile ("move sp, %0" : : "r"(stack_top));
-	barebox_pbl_start(membase, memsize, boarddata, flags);
+	riscv_set_flags(flags);
+	barebox_pbl_start(membase, memsize, boarddata);
 }
 
diff --git a/arch/riscv/boot/entry.h b/arch/riscv/boot/entry.h
index fb4af5eae5..b3a24d2783 100644
--- a/arch/riscv/boot/entry.h
+++ b/arch/riscv/boot/entry.h
@@ -6,12 +6,10 @@
 
 void __noreturn barebox_non_pbl_start(unsigned long membase,
 				      unsigned long memsize,
-				      void *boarddata,
-				      unsigned flags);
+				      void *boarddata);
 
 void __noreturn barebox_pbl_start(unsigned long membase,
 				  unsigned long memsize,
-				  void *boarddata,
-				  unsigned flags);
+				  void *boarddata);
 
 #endif
diff --git a/arch/riscv/boot/start.c b/arch/riscv/boot/start.c
index 8b4c8bb2f0..27d9066243 100644
--- a/arch/riscv/boot/start.c
+++ b/arch/riscv/boot/start.c
@@ -27,7 +27,6 @@ static unsigned long riscv_barebox_size;
 static unsigned long riscv_endmem;
 static void *barebox_boarddata;
 static unsigned long barebox_boarddata_size;
-unsigned barebox_riscv_pbl_flags;
 
 void *barebox_riscv_boot_dtb(void)
 {
@@ -108,7 +107,7 @@ device_initcall(barebox_memory_areas_init);
  */
 __noreturn __no_sanitize_address __section(.text_entry)
 void barebox_non_pbl_start(unsigned long membase, unsigned long memsize,
-			   void *boarddata, unsigned flags)
+			   void *boarddata)
 {
 	unsigned long endmem = membase + memsize;
 	unsigned long malloc_start, malloc_end;
@@ -121,7 +120,7 @@ void barebox_non_pbl_start(unsigned long membase, unsigned long memsize,
 
 	barrier();
 
-	irq_init_vector(__riscv_mode(flags));
+	irq_init_vector(riscv_mode());
 
 	pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize);
 
@@ -171,20 +170,18 @@ void barebox_non_pbl_start(unsigned long membase, unsigned long memsize,
 
 	mem_malloc_init((void *)malloc_start, (void *)malloc_end - 1);
 
-	barebox_riscv_pbl_flags = flags;
-
 	pr_debug("starting barebox...\n");
 
 	start_barebox();
 }
 
-void start(unsigned long membase, unsigned long memsize, void *boarddata, unsigned flags);
+void start(unsigned long membase, unsigned long memsize, void *boarddata);
 /*
  * First function in the uncompressed image. We get here from
  * the pbl. The stack already has been set up by the pbl.
  */
 void __no_sanitize_address __section(.text_entry) start(unsigned long membase,
-		unsigned long memsize, void *boarddata, unsigned flags)
+		unsigned long memsize, void *boarddata)
 {
-	barebox_non_pbl_start(membase, memsize, boarddata, flags);
+	barebox_non_pbl_start(membase, memsize, boarddata);
 }
diff --git a/arch/riscv/boot/uncompress.c b/arch/riscv/boot/uncompress.c
index 4ed9b4d371..ee24f81e01 100644
--- a/arch/riscv/boot/uncompress.c
+++ b/arch/riscv/boot/uncompress.c
@@ -24,16 +24,16 @@ unsigned long free_mem_ptr;
 unsigned long free_mem_end_ptr;
 
 void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize,
-				  void *fdt, unsigned flags)
+				  void *fdt)
 {
 	uint32_t pg_len, uncompressed_len;
-	void __noreturn (*barebox)(unsigned long, unsigned long, void *, unsigned);
+	void __noreturn (*barebox)(unsigned long, unsigned long, void *);
 	unsigned long endmem = membase + memsize;
 	unsigned long barebox_base;
 	void *pg_start, *pg_end;
 	unsigned long pc = get_pc();
 
-	irq_init_vector(__riscv_mode(flags));
+	irq_init_vector(riscv_mode());
 
 	/* piggy data is not relocated, so determine the bounds now */
 	pg_start = input_data + get_runtime_offset();
@@ -72,5 +72,5 @@ void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize,
 
 	pr_debug("jumping to uncompressed image at 0x%p. dtb=0x%p\n", barebox, fdt);
 
-	barebox(membase, memsize, fdt, flags);
+	barebox(membase, memsize, fdt);
 }
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/rv64i_defconfig
index c2edd2dc28..2c5bfd2df1 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/rv64i_defconfig
@@ -1,5 +1,13 @@
 CONFIG_ARCH_RV64I=y
+CONFIG_SOC_ALLWINNER_SUN20I=y
+CONFIG_SOC_SIFIVE=y
+CONFIG_SOC_STARFIVE=y
 CONFIG_SOC_VIRT=y
+CONFIG_BOARD_ALLWINNER_D1=y
+CONFIG_BOARD_BEAGLEV=y
+CONFIG_BOARD_BEAGLEV_BETA=y
+CONFIG_BOARD_HIFIVE=y
+CONFIG_BOARD_RISCV_GENERIC_DT=y
 CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_STACK_SIZE=0x20000
 CONFIG_MALLOC_SIZE=0x0
@@ -13,6 +21,7 @@ CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
+CONFIG_SYSTEM_PARTITIONS=y
 CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
@@ -47,9 +56,11 @@ CONFIG_CMD_LN=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_SHA1SUM=y
 CONFIG_CMD_SHA256SUM=y
+CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_MSLEEP=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
@@ -66,6 +77,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_POWEROFF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_WD=y
 CONFIG_CMD_2048=y
 CONFIG_CMD_BAREBOX_UPDATE=y
 CONFIG_CMD_OF_DIFF=y
@@ -85,13 +97,23 @@ CONFIG_NET_FASTBOOT=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_OF_BAREBOX_ENV_IN_FS=y
 CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_SERIAL_SBI=y
 CONFIG_VIRTIO_CONSOLE=y
+CONFIG_SERIAL_SIFIVE=y
+CONFIG_DRIVER_NET_MACB=y
+CONFIG_DRIVER_NET_DESIGNWARE=y
+CONFIG_DRIVER_NET_DESIGNWARE_GENERIC=y
+CONFIG_DRIVER_NET_DESIGNWARE_STARFIVE=y
 CONFIG_DRIVER_NET_VIRTIO=y
+CONFIG_MICREL_PHY=y
+CONFIG_SPI_MEM=y
 CONFIG_DRIVER_SPI_GPIO=y
+CONFIG_SPI_SIFIVE=y
 CONFIG_I2C=y
 CONFIG_I2C_GPIO=y
 CONFIG_MTD=y
 # CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_RAW_DEVICE=y
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_M25P80=y
 CONFIG_MTD_MTDRAM=y
@@ -104,21 +126,42 @@ CONFIG_VIDEO=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_DRIVER_VIDEO_BOCHS_PCI=y
 CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
+CONFIG_MCI=y
+CONFIG_MCI_SPI=y
+CONFIG_MCI_DW=y
 CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
 CONFIG_STATE_DRV=y
 CONFIG_EEPROM_AT24=y
 CONFIG_VIRTIO_INPUT=y
+CONFIG_SRAM=y
+CONFIG_STARFIVE_PWRSEQ=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_LED_GPIO_OF=y
+CONFIG_LED_TRIGGERS=y
+CONFIG_WATCHDOG=y
+CONFIG_STARFIVE_WDT=y
 CONFIG_HWRNG=y
 CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_GPIO_SIFIVE=y
+CONFIG_HW_RANDOM_STARFIVE=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
-# CONFIG_PINCTRL is not set
+CONFIG_GPIO_STARFIVE=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_NVMEM=y
+CONFIG_NVMEM_RMEM=y
+CONFIG_STARFIVE_OTP=y
 CONFIG_PCI_ECAM_GENERIC=y
 CONFIG_BLK_DEV_NVME=y
 CONFIG_SYSCON_REBOOT_MODE=y
+CONFIG_NVMEM_REBOOT_MODE=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_POWER_RESET_SYSCON_POWEROFF=y
 CONFIG_POWER_RESET_HTIF_POWEROFF=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_VIRTIO_MMIO=y
+# CONFIG_VIRTIO_MENU is not set
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_NFS=y
diff --git a/arch/riscv/configs/sifive_defconfig b/arch/riscv/configs/sifive_defconfig
deleted file mode 100644
index 6ebe6eaf37..0000000000
--- a/arch/riscv/configs/sifive_defconfig
+++ /dev/null
@@ -1,129 +0,0 @@
-CONFIG_ARCH_RV64I=y
-CONFIG_SOC_SIFIVE=y
-CONFIG_BOARD_HIFIVE=y
-CONFIG_BOARD_RISCV_GENERIC_DT=y
-CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_STACK_SIZE=0x20000
-CONFIG_MALLOC_SIZE=0x0
-CONFIG_MALLOC_TLSF=y
-CONFIG_KALLSYMS=y
-CONFIG_RELOCATABLE=y
-CONFIG_PANIC_HANG=y
-CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_MENU=y
-CONFIG_CONSOLE_ALLOW_COLOR=y
-CONFIG_PBL_CONSOLE=y
-CONFIG_PARTITION_DISK_EFI=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_STATE=y
-CONFIG_STATE_CRYPTO=y
-CONFIG_BOOTCHOOSER=y
-CONFIG_RESET_SOURCE=y
-CONFIG_MACHINE_ID=y
-CONFIG_CMD_DMESG=y
-CONFIG_LONGHELP=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_IMD=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_POLLER=y
-CONFIG_CMD_SLICE=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_BOOTCHOOSER=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_CMP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_SHA256SUM=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_FBTEST=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MM=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DETECT=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_POWEROFF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_2048=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_OF_DIFF=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_DISPLAY_TIMINGS=y
-CONFIG_CMD_OF_FIXUP_STATUS=y
-CONFIG_CMD_OF_OVERLAY=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_DHRYSTONE=y
-CONFIG_NET=y
-CONFIG_NET_NFS=y
-CONFIG_NET_FASTBOOT=y
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_VIRTIO_CONSOLE=y
-CONFIG_SERIAL_SIFIVE=y
-CONFIG_DRIVER_NET_MACB=y
-CONFIG_DRIVER_SPI_GPIO=y
-CONFIG_SPI_SIFIVE=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_MTD=y
-CONFIG_MTD_RAW_DEVICE=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_M25P80=y
-CONFIG_DRIVER_CFI=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
-CONFIG_VIRTIO_BLK=y
-CONFIG_VIDEO=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
-CONFIG_MCI=y
-CONFIG_MCI_SPI=y
-CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
-CONFIG_EEPROM_AT24=y
-CONFIG_HWRNG=y
-CONFIG_HW_RANDOM_VIRTIO=y
-CONFIG_GPIO_SIFIVE=y
-# CONFIG_PINCTRL is not set
-CONFIG_SYSCON_REBOOT_MODE=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-CONFIG_POWER_RESET_GPIO_RESTART=y
-CONFIG_VIRTIO_MMIO=y
-CONFIG_FS_EXT4=y
-CONFIG_FS_TFTP=y
-CONFIG_FS_NFS=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FAT_WRITE=y
-CONFIG_FS_FAT_LFN=y
-CONFIG_FS_UIMAGEFS=y
-CONFIG_FS_PSTORE=y
-CONFIG_FS_SQUASHFS=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_LZ4_DECOMPRESS=y
-CONFIG_ZSTD_DECOMPRESS=y
-CONFIG_XZ_DECOMPRESS=y
-CONFIG_BASE64=y
-CONFIG_DIGEST_CRC32_GENERIC=y
-CONFIG_IMD_TARGET=y
-CONFIG_BAREBOXENV_TARGET=y
-CONFIG_BAREBOXCRC32_TARGET=y
diff --git a/arch/riscv/configs/starfive_defconfig b/arch/riscv/configs/starfive_defconfig
deleted file mode 100644
index c4df2256f5..0000000000
--- a/arch/riscv/configs/starfive_defconfig
+++ /dev/null
@@ -1,131 +0,0 @@
-CONFIG_ARCH_RV64I=y
-CONFIG_SOC_STARFIVE=y
-CONFIG_BOARD_BEAGLEV=y
-CONFIG_BOARD_BEAGLEV_BETA=y
-CONFIG_BOARD_RISCV_GENERIC_DT=y
-CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_STACK_SIZE=0x20000
-CONFIG_MALLOC_SIZE=0x0
-CONFIG_MALLOC_TLSF=y
-CONFIG_KALLSYMS=y
-CONFIG_RELOCATABLE=y
-CONFIG_PANIC_HANG=y
-CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_MENU=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_SYSTEM_PARTITIONS=y
-CONFIG_IMD_TARGET=y
-CONFIG_CONSOLE_ALLOW_COLOR=y
-CONFIG_PBL_CONSOLE=y
-CONFIG_PARTITION_DISK_EFI=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_BAREBOXENV_TARGET=y
-CONFIG_BAREBOXCRC32_TARGET=y
-CONFIG_STATE=y
-CONFIG_STATE_CRYPTO=y
-CONFIG_BOOTCHOOSER=y
-CONFIG_RESET_SOURCE=y
-CONFIG_MACHINE_ID=y
-CONFIG_CMD_DMESG=y
-CONFIG_LONGHELP=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_IMD=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_POLLER=y
-CONFIG_CMD_SLICE=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_BOOTCHOOSER=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_CMP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_SHA256SUM=y
-CONFIG_CMD_UNCOMPRESS=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MM=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DETECT=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_POWEROFF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_WD=y
-CONFIG_CMD_2048=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_OF_DIFF=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_DISPLAY_TIMINGS=y
-CONFIG_CMD_OF_FIXUP_STATUS=y
-CONFIG_CMD_OF_OVERLAY=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_DHRYSTONE=y
-CONFIG_NET=y
-CONFIG_NET_NFS=y
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_DRIVER_NET_DESIGNWARE=y
-CONFIG_DRIVER_NET_DESIGNWARE_GENERIC=y
-CONFIG_DRIVER_NET_DESIGNWARE_STARFIVE=y
-CONFIG_MICREL_PHY=y
-CONFIG_SPI_MEM=y
-CONFIG_DRIVER_SPI_GPIO=y
-CONFIG_MCI=y
-CONFIG_MCI_DW=y
-CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
-CONFIG_SRAM=y
-CONFIG_STARFIVE_PWRSEQ=y
-CONFIG_LED=y
-CONFIG_LED_GPIO=y
-CONFIG_LED_GPIO_OF=y
-CONFIG_LED_TRIGGERS=y
-CONFIG_WATCHDOG=y
-CONFIG_STARFIVE_WDT=y
-CONFIG_HWRNG=y
-CONFIG_HW_RANDOM_STARFIVE=y
-CONFIG_GPIO_GENERIC_PLATFORM=y
-CONFIG_GPIO_STARFIVE=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_NVMEM=y
-CONFIG_NVMEM_RMEM=y
-CONFIG_STARFIVE_OTP=y
-CONFIG_SYSCON_REBOOT_MODE=y
-CONFIG_NVMEM_REBOOT_MODE=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_RESET_GPIO_RESTART=y
-# CONFIG_VIRTIO_MENU is not set
-CONFIG_FS_EXT4=y
-CONFIG_FS_TFTP=y
-CONFIG_FS_NFS=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FAT_WRITE=y
-CONFIG_FS_FAT_LFN=y
-CONFIG_FS_UIMAGEFS=y
-CONFIG_FS_PSTORE=y
-CONFIG_FS_SQUASHFS=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_LZ4_DECOMPRESS=y
-CONFIG_ZSTD_DECOMPRESS=y
-CONFIG_XZ_DECOMPRESS=y
-CONFIG_BASE64=y
-CONFIG_DIGEST_CRC32_GENERIC=y
diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
index 9a0b9326b2..c787f89001 100644
--- a/arch/riscv/include/asm/cache.h
+++ b/arch/riscv/include/asm/cache.h
@@ -6,10 +6,29 @@
 #ifndef _ASM_RISCV_CACHE_H
 #define _ASM_RISCV_CACHE_H
 
+#include <asm/vendorid_list.h>
+
+static inline void thead_local_flush_icache_all(void)
+{
+	/*
+	 * According [1] "13.3 Example of cache settings"
+	 * [1]: https://github.com/T-head-Semi/openc906/blob/main/ \
+	 *	doc/openc906%20datasheet.pd
+	 */
+	__asm__ volatile (".long 0x0100000b" ::: "memory"); /* th.icache.iall */
+	__asm__ volatile (".long 0x01b0000b" ::: "memory"); /* th.sync.is */
+}
+
 static inline void local_flush_icache_all(void)
 {
-#ifdef HAS_CACHE
-	asm volatile ("fence.i" ::: "memory");
+#ifdef CONFIG_HAS_CACHE
+	switch(riscv_vendor_id()) {
+	case THEAD_VENDOR_ID:
+		thead_local_flush_icache_all();
+		break;
+	default:
+		__asm__ volatile ("fence.i" ::: "memory");
+	}
 #endif
 }
 
diff --git a/arch/riscv/include/asm/debug_ll.h b/arch/riscv/include/asm/debug_ll.h
index de9bc5f5fd..34294b09dd 100644
--- a/arch/riscv/include/asm/debug_ll.h
+++ b/arch/riscv/include/asm/debug_ll.h
@@ -29,6 +29,11 @@
 #define DEBUG_LL_UART_CLK       (58982400  / 16)
 #define DEBUG_LL_UART_SHIFT	0
 #define DEBUG_LL_UART_IOSIZE8
+#elif defined CONFIG_DEBUG_SUN20I
+#define DEBUG_LL_UART_ADDR	0x2500000
+#define DEBUG_LL_UART_CLK       (24000000 / 16)
+#define DEBUG_LL_UART_SHIFT	2
+#define DEBUG_LL_UART_IOSIZE32
 #endif
 
 #define DEBUG_LL_UART_BPS       CONFIG_BAUDRATE
diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm/system.h
index adf856f9e9..f0b6bf2945 100644
--- a/arch/riscv/include/asm/system.h
+++ b/arch/riscv/include/asm/system.h
@@ -5,6 +5,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <asm/sbi.h>
+
 #define RISCV_MODE_MASK 0x3
 enum riscv_mode {
     RISCV_U_MODE	= 0,
@@ -13,7 +15,39 @@ enum riscv_mode {
     RISCV_M_MODE	= 3,
 };
 
-static inline enum riscv_mode __riscv_mode(u32 flags)
+static inline void riscv_set_flags(unsigned flags)
+{
+	switch (flags & RISCV_MODE_MASK) {
+	case RISCV_S_MODE:
+		__asm__ volatile("csrw sscratch, %0" : : "r"(flags));
+		break;
+	case RISCV_M_MODE:
+		__asm__ volatile("csrw mscratch, %0" : : "r"(flags));
+		break;
+	default:
+		/* Other modes are not implemented yet */
+		break;
+	}
+}
+
+static inline u32 riscv_get_flags(void)
+{
+	u32 flags = 0;
+
+	if (IS_ENABLED(CONFIG_RISCV_S_MODE))
+		__asm__ volatile("csrr %0, sscratch" : "=r"(flags));
+
+	/*
+	 * Since we always set the scratch register on the very beginning, a
+	 * empty flags indicates that we are running in M-mode.
+	 */
+	if (!flags)
+		__asm__ volatile("csrr %0, mscratch" : "=r"(flags));
+
+	return flags;
+}
+
+static inline enum riscv_mode riscv_mode(void)
 {
 	/* allow non-LTO builds to discard code for unused modes */
 	if (!IS_ENABLED(CONFIG_RISCV_MULTI_MODE)) {
@@ -23,14 +57,14 @@ static inline enum riscv_mode __riscv_mode(u32 flags)
 			return RISCV_S_MODE;
 	}
 
-	return flags & RISCV_MODE_MASK;
+	return riscv_get_flags() & RISCV_MODE_MASK;
 }
 
-static inline long __riscv_hartid(u32 flags)
+static inline long riscv_hartid(void)
 {
 	long hartid = -1;
 
-	switch (__riscv_mode(flags)) {
+	switch (riscv_mode()) {
 	case RISCV_S_MODE:
 		__asm__ volatile("mv %0, tp\n" : "=r"(hartid) :);
 		break;
@@ -42,19 +76,29 @@ static inline long __riscv_hartid(u32 flags)
 	return hartid;
 }
 
-#ifndef __PBL__
-extern unsigned barebox_riscv_pbl_flags;
-
-static inline enum riscv_mode riscv_mode(void)
+static inline long riscv_vendor_id(void)
 {
-	return __riscv_mode(barebox_riscv_pbl_flags);
-}
+	struct sbiret ret;
+	long id;
 
-static inline long riscv_hartid(void)
-{
-	return __riscv_hartid(barebox_riscv_pbl_flags);
+	switch (riscv_mode()) {
+	case RISCV_M_MODE:
+		__asm__ volatile("csrr %0, mvendorid\n" : "=r"(id));
+		return id;
+	case RISCV_S_MODE:
+		/*
+		 * We need to use the sbi_ecall() since it can be that we got
+		 * called without a working stack
+		 */
+		ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MVENDORID,
+				0, 0, 0, 0, 0, 0);
+		if (!ret.error)
+			return ret.value;
+		return -1;
+	default:
+		return -1;
+	}
 }
-#endif
 
 #endif
 
diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
new file mode 100644
index 0000000000..cb89af3f07
--- /dev/null
+++ b/arch/riscv/include/asm/vendorid_list.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2021 SiFive
+ */
+#ifndef ASM_VENDOR_LIST_H
+#define ASM_VENDOR_LIST_H
+
+#define SIFIVE_VENDOR_ID	0x489
+#define THEAD_VENDOR_ID		0x5b7
+
+#endif