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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2021-09-16 11:35:14 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-02 11:19:17 +0200 |
| commit | b51b15ba173825124ba6f21387183357a5dd6d1c (patch) | |
| tree | fee16b46a4a83acfb9550abb57a6e33808c3a08a /arch/riscv | |
| parent | 1c8625aac0d204e567fcee5a8b4e9d0145f011c0 (diff) | |
| download | barebox-b51b15ba173825124ba6f21387183357a5dd6d1c.tar.gz barebox-b51b15ba173825124ba6f21387183357a5dd6d1c.tar.xz | |
RISC-V: board-dt-2nd: move low level init into nonnaked function
The generic DT image for RISC-V mimics a kernel image and specifies
a load offset that it expects to be honoured. The stack should then
grow down from the load address. This didn't work as intended though
with riscv64-linux-gnu-gcc (Debian 10.2.1-6), because of the entry
point's __naked attribute: local variables overwrote the first bytes
of the entry point. Fix this by using a noinline nonnaked function.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210916093514.21267-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/boot/board-dt-2nd.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/riscv/boot/board-dt-2nd.c b/arch/riscv/boot/board-dt-2nd.c index f31c48a906..8b78e1b11d 100644 --- a/arch/riscv/boot/board-dt-2nd.c +++ b/arch/riscv/boot/board-dt-2nd.c @@ -40,7 +40,8 @@ static const struct fdt_device_id console_ids[] = { { /* sentinel */ } }; -ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2) +static void noinline __noreturn start_dt_2nd_nonnaked(unsigned long hartid, + unsigned long _fdt) { unsigned long membase, memsize, endmem, endfdt, uncompressed_len; struct fdt_header *fdt = (void *)_fdt; @@ -75,3 +76,8 @@ ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2) barebox_riscv_supervisor_entry(membase, memsize, hartid, fdt); } + +ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2) +{ + start_dt_2nd_nonnaked(hartid, _fdt); +} |