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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2023-04-11 09:14:24 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-04-11 13:43:19 +0200 |
commit | edb5d1a89633390b230ee99e4625673faca9ef21 (patch) | |
tree | d57637cdc3242ed467bed38d40074fa9cf413e06 /arch/riscv | |
parent | b25f75f2279f2b7939d74fa7ef61bf7e9a9fe224 (diff) | |
download | barebox-edb5d1a89633390b230ee99e4625673faca9ef21.tar.gz barebox-edb5d1a89633390b230ee99e4625673faca9ef21.tar.xz |
RISC-V: board-dt-2nd: fix hang in startup
relocate_to_current_adr() will do a sync_caches_for_execution() after
concluding. The method used for icache synchronization depends on the
CPU being used. Allwinner D1 support added the assumption that any
code running in S-Mode will have populated sscratch with the flags
before calling riscv_vendor_id(). This is not the case for
barebox-dt-2nd, which does relocation before riscv_set_flags().
Quick fix this by calling riscv_set_flags manually.
Cc: Marco Felsch <m.felsch@pengutronix.de>
Fixes: c986c565b023 ("RISC-V: use m/sscratch registers for barebox_riscv_pbl_flags")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230411071436.1630752-3-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/boot/board-dt-2nd.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/boot/board-dt-2nd.c b/arch/riscv/boot/board-dt-2nd.c index 8b78e1b11d..f1479d8346 100644 --- a/arch/riscv/boot/board-dt-2nd.c +++ b/arch/riscv/boot/board-dt-2nd.c @@ -50,6 +50,12 @@ static void noinline __noreturn start_dt_2nd_nonnaked(unsigned long hartid, if (!fdt) hang(); + /* + * We need to call this here, as a multiplatform build + * depends on querying mode for riscv_vendor_id() + */ + riscv_set_flags(RISCV_S_MODE); + relocate_to_current_adr(); setup_c(); |