Merge branch 'for-next/misc'

8 files changed, 24 insertions, 28 deletions

diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c
index 5554b78d6d..fb4a5d1cf0 100644
--- a/arch/arm/boards/chumby_falconwing/falconwing.c
+++ b/arch/arm/boards/chumby_falconwing/falconwing.c
@@ -65,7 +65,7 @@ static struct fb_videomode falconwing_vmode = {
 	.xres = 320,
 	.yres = 240,
 	.pixclock = KHZ2PICOS(6250),    /* max. 10 MHz */
-	/* line lenght should be 64 µs */
+	/* line length should be 64 µs */
 	.left_margin = 28,
 	.hsync_len = 24,
 	.right_margin = 28,
diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c
index 441d56348c..c25f33ae20 100644
--- a/arch/arm/boards/phytec-som-am335x/board.c
+++ b/arch/arm/boards/phytec-som-am335x/board.c
@@ -124,15 +124,11 @@ static int physom_devices_init(void)
 				ARRAY_SIZE(nandslots));
 	am33xx_bbu_emmc_mlo_register_handler("MLO.emmc", "/dev/mmc1");
 
-	if (IS_ENABLED(CONFIG_STATE)) {
-		state = state_by_name("am335x_phytec_mac_state");
-		if (state)
-			for (state_i = 0; state_i < 2; state_i++) {
-				state_ret = state_read_mac(state,
-						      eth_names[state_i], &mac[0]);
-				if (!state_ret && is_valid_ether_addr(&mac[0]))
-					eth_register_ethaddr(state_i, mac);
-			}
+	state = state_by_name("am335x_phytec_mac_state");
+	for (state_i = 0; state_i < 2; state_i++) {
+		state_ret = state_read_mac(state, eth_names[state_i], &mac[0]);
+		if (!state_ret && is_valid_ether_addr(&mac[0]))
+			eth_register_ethaddr(state_i, mac);
 	}
 
 	if (IS_ENABLED(CONFIG_PHYTEC_SOM_AM335X_OF_AUTOENABLE)) {
diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c b/arch/arm/boards/stm32mp157c-dk2/board.c
index cbfe21db6a..9cb861af85 100644
--- a/arch/arm/boards/stm32mp157c-dk2/board.c
+++ b/arch/arm/boards/stm32mp157c-dk2/board.c
@@ -5,7 +5,7 @@
 #include <asm/memory.h>
 #include <mach/stm32.h>
 
-static int dk2_postcore_init(void)
+static int dk2_mem_init(void)
 {
 	if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
 		return 0;
@@ -14,4 +14,4 @@ static int dk2_postcore_init(void)
 
 	return 0;
 }
-mem_initcall(dk2_postcore_init);
+mem_initcall(dk2_mem_init);
diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp157a-dk1.dtsi
index cd3d614d46..f7fbdcd174 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1.dtsi
@@ -8,6 +8,13 @@
 #include <dt-bindings/gpio/gpio.h>
 
 / {
+	chosen {
+		environment {
+			compatible = "barebox,environment";
+			device-path = &sdmmc1, "partname:barebox-environment";
+		};
+	};
+
 	led {
 		red {
 			label = "error";
diff --git a/arch/arm/mach-samsung/mem-s3c64xx.c b/arch/arm/mach-samsung/mem-s3c64xx.c
index aca2cf5066..c51245a378 100644
--- a/arch/arm/mach-samsung/mem-s3c64xx.c
+++ b/arch/arm/mach-samsung/mem-s3c64xx.c
@@ -39,7 +39,7 @@ int s3c6410_setup_chipselect(int no, const struct s3c6410_chipselect *c)
 	tacs = DIV_ROUND_UP(c->adr_setup_t, per_t);
 	/* start of CS to read/write assertion (= access setup) */
 	tcos = DIV_ROUND_UP(c->access_setup_t, per_t);
-	/* length of read/write assertion (= access lenght) */
+	/* length of read/write assertion (= access length) */
 	tacc = DIV_ROUND_UP(c->access_t, per_t) - 1;
 	/* CS hold after access is finished */
 	tcoh = DIV_ROUND_UP(c->cs_hold_t, per_t);
diff --git a/arch/mips/dts/ar9331-dptechnics-dpt-module.dts b/arch/mips/dts/ar9331-dptechnics-dpt-module.dts
index 315589aab9..cbaf5ab39e 100644
--- a/arch/mips/dts/ar9331-dptechnics-dpt-module.dts
+++ b/arch/mips/dts/ar9331-dptechnics-dpt-module.dts
@@ -15,7 +15,7 @@
 		art@0 {
 			compatible = "qca,art-ar9331", "qca,art";
 			device-path = &spiflash_art;
-			barebox,provide-mac-address = <&mac0>;
+			barebox,provide-mac-address = <&eth0>;
 		};
 	};
 
@@ -48,7 +48,3 @@
 		reg = <0x7f0000 0x10000>;
 	};
 };
-
-&mac0 {
-	status = "okay";
-};
diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi
index 42baae1e89..72f029754e 100644
--- a/arch/mips/dts/ar9331.dtsi
+++ b/arch/mips/dts/ar9331.dtsi
@@ -5,14 +5,11 @@
 			reg = <0x18060008 0x8>;
 			clocks = <&pll ATH79_CLK_CPU>;
 		};
-
-		mac0: mac@19000000 {
-			compatible = "qca,ar9331-ge0";
-			reg = <0x18070000 0x00000100>,
-			      <0x19000000 0x01000000>;
-			reg-names = "gmac", "ge0";
-			phy-mode = "mii";
-			status = "disabled";
-               };
 	};
 };
+
+&eth0 {
+	reg = <0x19000000 0x200>,
+	      <0x18070000 0x00000100>;
+	reg-names = "ge0", "gmac";
+};
diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/tplink-mr3020.dts
index e30eae1578..c6ae154f4f 100644
--- a/arch/mips/dts/tplink-mr3020.dts
+++ b/arch/mips/dts/tplink-mr3020.dts
@@ -28,6 +28,6 @@
 	};
 };
 
-&mac0 {
+&eth0 {
 	status = "okay";
 };