i.MX31:

Rework iomux support for i.MX31:

- rename gpio-imx31.c to iomux-v2.c
- add pin definitions from Kernel
- fixup pcm037 board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

3 files changed, 100 insertions, 35 deletions

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ca58737c96..1a062704d7 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,7 +1,7 @@
 obj-y += clocksource.o
 obj-$(CONFIG_ARCH_IMX1) += speed-imx1.o gpio.o
 obj-$(CONFIG_ARCH_IMX27) += speed-imx27.o gpio.o imx27.o
-obj-$(CONFIG_ARCH_IMX31) += speed-imx31.o gpio-imx31.o
+obj-$(CONFIG_ARCH_IMX31) += speed-imx31.o iomux-v2.o
 obj-$(CONFIG_ARCH_IMX35) += speed-imx35.o gpio-imx35.o
 obj-$(CONFIG_IMX_CLKO)	+= clko.o
 obj-y += speed.o
diff --git a/arch/arm/mach-imx/gpio-imx31.c b/arch/arm/mach-imx/gpio-imx31.c
deleted file mode 100644
index a4d0a8f5df..0000000000
--- a/arch/arm/mach-imx/gpio-imx31.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- *  (C) 2007, Sascha Hauer <sha@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <common.h>
-#include <asm/arch/imx-regs.h>
-
-void imx_gpio_mode(unsigned long mode)
-{
-	unsigned long reg, shift, tmp;
-
-	reg = IOMUXC_BASE + (mode & 0xfc);
-	shift = (~mode & 0x3) * 8;
-
-	tmp = __REG(reg);
-	tmp &= ~(0xff << shift);
-	tmp |= ((mode >> 8) & 0xff) << shift;
-	__REG(reg) = tmp;
-}
diff --git a/arch/arm/mach-imx/iomux-v2.c b/arch/arm/mach-imx/iomux-v2.c
new file mode 100644
index 0000000000..d040deeec5
--- /dev/null
+++ b/arch/arm/mach-imx/iomux-v2.c
@@ -0,0 +1,99 @@
+/*
+ *  (C) 2007, Sascha Hauer <sha@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux-mx31.h>
+
+/*
+ * IOMUX register (base) addresses
+ */
+#define IOMUXINT_OBS1	(IOMUXC_BASE + 0x000)
+#define IOMUXINT_OBS2	(IOMUXC_BASE + 0x004)
+#define IOMUXGPR	(IOMUXC_BASE + 0x008)
+#define IOMUXSW_MUX_CTL	(IOMUXC_BASE + 0x00C)
+#define IOMUXSW_PAD_CTL	(IOMUXC_BASE + 0x154)
+
+#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
+/*
+ * set the mode for a IOMUX pin.
+ */
+int imx_iomux_mode(unsigned int pin_mode)
+{
+	u32 field, l, mode, ret = 0;
+	void __iomem *reg;
+
+	reg = (void *)(IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK));
+	field = pin_mode & 0x3;
+	mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT;
+
+	pr_debug("%s: reg offset = 0x%x field = %d mode = 0x%02x\n",
+			__func__, (pin_mode & IOMUX_REG_MASK), field, mode);
+
+	l = readl(reg);
+	l &= ~(0xff << (field * 8));
+	l |= mode << (field * 8);
+	writel(l, reg);
+
+	return ret;
+}
+EXPORT_SYMBOL(mxc_iomux_mode);
+
+/*
+ * This function configures the pad value for a IOMUX pin.
+ */
+void imx_iomux_set_pad(enum iomux_pins pin, u32 config)
+{
+	u32 field, l;
+	void __iomem *reg;
+
+	pin &= IOMUX_PADNUM_MASK;
+	reg = (void *)(IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4);
+	field = (pin + 2) % 3;
+
+	pr_debug("%s: reg offset = 0x%x, field = %d\n",
+			__func__, (pin + 2) / 3, field);
+
+	l = readl(reg);
+	l &= ~(0x1ff << (field * 10));
+	l |= config << (field * 10);
+	writel(l, reg);
+}
+EXPORT_SYMBOL(mxc_iomux_set_pad);
+
+/*
+ * This function enables/disables the general purpose function for a particular
+ * signal.
+ */
+void imx_iomux_set_gpr(enum iomux_gp_func gp, int en)
+{
+	u32 l;
+
+	l = readl(IOMUXGPR);
+	if (en)
+		l |= gp;
+	else
+		l &= ~gp;
+
+	writel(l, IOMUXGPR);
+}
+EXPORT_SYMBOL(mxc_iomux_set_gpr);
+
+