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| author | Juergen Beisert <jbe@pengutronix.de> | 2010-01-29 12:51:16 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-02-01 16:28:06 +0100 |
| commit | e4ee34a829a00e058828f3daade04f4141ea3ef9 (patch) | |
| tree | e89d6b7839008125bd7e16cac6fe918007275171 /arch | |
| parent | 1e658639f1f8ebd2862964ebc50ee0bd122633f4 (diff) | |
| download | barebox-e4ee34a829a00e058828f3daade04f4141ea3ef9.tar.gz barebox-e4ee34a829a00e058828f3daade04f4141ea3ef9.tar.xz | |
i.MX35: Fix pad control bit positions
Using these macros simplify the configuration for special GPIO usage. But they
should use correct bit positions for usage in the IOMUX_PAD() macro.
Note: These are the bit positions of the i.MX35 CPU. Not checked for the other
i.MX3x CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/include/mach/iomux-v3.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h index 8b2f1ae7f9..1d660a0af3 100644 --- a/arch/arm/mach-imx/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/include/mach/iomux-v3.h @@ -68,25 +68,25 @@ struct pad_desc { /* * Use to set PAD control */ -#define PAD_CTL_DRIVE_VOLTAGE_3_3_V 0 -#define PAD_CTL_DRIVE_VOLTAGE_1_8_V 1 +#define PAD_CTL_DRIVE_VOLTAGE_3_3_V (0) +#define PAD_CTL_DRIVE_VOLTAGE_1_8_V (1 << 13) -#define PAD_CTL_NO_HYSTERESIS 0 -#define PAD_CTL_HYSTERESIS 1 +#define PAD_CTL_NO_HYSTERESIS (0) +#define PAD_CTL_HYSTERESIS (1 << 8) -#define PAD_CTL_PULL_DISABLED 0x0 -#define PAD_CTL_PULL_KEEPER 0xa -#define PAD_CTL_PULL_DOWN_100K 0xc -#define PAD_CTL_PULL_UP_47K 0xd -#define PAD_CTL_PULL_UP_100K 0xe -#define PAD_CTL_PULL_UP_22K 0xf +#define PAD_CTL_PULL_DISABLED (0) +#define PAD_CTL_PULL_KEEPER (0xa << 4) +#define PAD_CTL_PULL_DOWN_100K (0xc << 4) +#define PAD_CTL_PULL_UP_47K (0xd << 4) +#define PAD_CTL_PULL_UP_100K (0xe << 4) +#define PAD_CTL_PULL_UP_22K (0xf << 4) -#define PAD_CTL_OUTPUT_CMOS 0 -#define PAD_CTL_OUTPUT_OPEN_DRAIN 1 +#define PAD_CTL_OUTPUT_CMOS (0) +#define PAD_CTL_OUTPUT_OPEN_DRAIN (1 << 3) -#define PAD_CTL_DRIVE_STRENGTH_NORM 0 -#define PAD_CTL_DRIVE_STRENGTH_HIGH 1 -#define PAD_CTL_DRIVE_STRENGTH_MAX 2 +#define PAD_CTL_DRIVE_STRENGTH_NORM (0) +#define PAD_CTL_DRIVE_STRENGTH_HIGH (1 << 1) +#define PAD_CTL_DRIVE_STRENGTH_MAX (2 << 1) #define PAD_CTL_SLEW_RATE_SLOW 0 #define PAD_CTL_SLEW_RATE_FAST 1 |