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authorSascha Hauer <s.hauer@pengutronix.de>2010-07-05 12:32:14 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2010-07-05 12:43:03 +0200
commitac234173cc3d11b671a893463d94ec9c4707ee4d (patch)
tree2a52791c2d34c5e994d0cb56ebba9c7115de7761 /arch
parentcb0d50e1a25d76b05f425c8ca9e05814f2d488fa (diff)
downloadbarebox-ac234173cc3d11b671a893463d94ec9c4707ee4d.tar.gz
barebox-ac234173cc3d11b671a893463d94ec9c4707ee4d.tar.xz
omap nand: cleanup
- Move oob layout to driver - make hwecc support nonoptional but selectable by the board. - let the boards decide which buswidth / ecc type to use. They know better than the user which gets confused by too many kconfig options. - Let the boards explicitly register the nand device. I tried to seperate this further, but failed because of too many dependencies in the code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap/include/mach/gpmc_nand.h45
1 files changed, 1 insertions, 44 deletions
diff --git a/arch/arm/mach-omap/include/mach/gpmc_nand.h b/arch/arm/mach-omap/include/mach/gpmc_nand.h
index c6c51d5d52..e23faabcac 100644
--- a/arch/arm/mach-omap/include/mach/gpmc_nand.h
+++ b/arch/arm/mach-omap/include/mach/gpmc_nand.h
@@ -68,54 +68,11 @@ struct gpmc_nand_platform_data {
#define NAND_WAITPOL_HIGH (1 << 0)
#define NAND_WAITPOL_MASK (1 << 0)
-#ifdef CONFIG_NAND_OMAP_GPMC_HWECC
/** plat_options: hw ecc enabled */
#define NAND_HWECC_ENABLE (1 << 1)
-#endif
/** plat_options: hw ecc disabled */
-#define NAND_HWECC_DISABLE (0 << 1)
#define NAND_HWECC_MASK (1 << 1)
-/* Typical BOOTROM oob layouts-requires hwecc **/
-#ifdef CONFIG_NAND_OMAP_GPMC_HWECC
-/** Large Page x8 NAND device Layout */
-#define GPMC_NAND_ECC_LP_x8_LAYOUT {\
- .eccbytes = 12,\
- .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
- 9, 10, 11, 12},\
- .oobfree = {\
- {.offset = 60,\
- .length = 2 } } \
-}
-
-/** Large Page x16 NAND device Layout */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT {\
- .eccbytes = 12,\
- .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13},\
- .oobfree = {\
- {.offset = 60,\
- .length = 2 } } \
-}
-
-/** Small Page x8 NAND device Layout */
-#define GPMC_NAND_ECC_SP_x8_LAYOUT {\
- .eccbytes = 3,\
- .eccpos = {1, 2, 3},\
- .oobfree = {\
- {.offset = 14,\
- .length = 2 } } \
-}
-
-/** Small Page x16 NAND device Layout */
-#define GPMC_NAND_ECC_SP_x16_LAYOUT {\
- .eccbytes = 3,\
- .eccpos = {2, 3, 4},\
- .oobfree = {\
- {.offset = 14,\
- .length = 2 } } \
-}
-
-#endif /* CONFIG_NAND_OMAP_GPMC_HWECC */
+int gpmc_generic_nand_devices_init(int cs, int width, int hwecc);
#endif /* __ASM_OMAP_NAND_GPMC_H */