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authorAlexander Kurz <akurz@blala.de>2016-06-30 21:14:00 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-07-04 09:31:41 +0200
commit2a760a7c1ed0ea30876aced20e301ba4498a0339 (patch)
tree08165ab91daa79188d28bbc3d1feb69720304f24 /arch
parent7e97af88585996b02c424bf0956a73e459bed76c (diff)
downloadbarebox-2a760a7c1ed0ea30876aced20e301ba4498a0339.tar.gz
barebox-2a760a7c1ed0ea30876aced20e301ba4498a0339.tar.xz
ARM i.MX: de-duplicate PLL initializer macros
Macros for three PLL setups got cloned in different board specific subdirs. Re-unify those macros into a common place and avoid checkpatch 80-char warnings when creating a new board subdir. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c3
-rw-r--r--arch/arm/boards/eukrea_cpuimx35/lowlevel.c5
-rw-r--r--arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S7
-rw-r--r--arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S5
-rw-r--r--arch/arm/boards/guf-cupid/board.c3
-rw-r--r--arch/arm/boards/guf-cupid/lowlevel.c5
-rw-r--r--arch/arm/boards/phytec-phycore-imx35/lowlevel.c5
-rw-r--r--arch/arm/boards/phytec-phycore-imx35/pcm043.c3
-rw-r--r--arch/arm/mach-imx/include/mach/imx-pll.h8
9 files changed, 11 insertions, 33 deletions
diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index 9c4ea13d8e..568abc2609 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -318,9 +318,6 @@ static int eukrea_cpuimx35_core_init(void)
core_initcall(eukrea_cpuimx35_core_init);
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-
static int do_cpufreq(int argc, char *argv[])
{
unsigned long freq;
diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
index 83c25feb41..27ca078fd2 100644
--- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
@@ -30,11 +30,6 @@
#include <asm-generic/memory_layout.h>
#include <asm/system.h>
-/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
-
void __bare_init __naked barebox_arm_reset_vector(void)
{
uint32_t r, s;
diff --git a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
index a5d54e8d01..bf3830d8d6 100644
--- a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
@@ -35,9 +35,8 @@
strb r1, [r0];
/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 (IMX_PLL_PD(1) | IMX_PLL_MFD(0) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
+#define MPCTL_PARAM_532_MX25 \
+ (IMX_PLL_PD(1) | IMX_PLL_MFD(0) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
.section ".text_bare_init","ax"
@@ -46,7 +45,7 @@ L2CACHE_PARAM: .word 0x00030024
CCM_CCMR_W: .word 0x003F4208
CCM_PDR0_W: .word 0x00801000
MPCTL_PARAM_399_W: .word MPCTL_PARAM_399
-MPCTL_PARAM_532_W: .word MPCTL_PARAM_532
+MPCTL_PARAM_532_W: .word MPCTL_PARAM_532_MX25
PPCTL_PARAM_W: .word PPCTL_PARAM_300
CCM_BASE_ADDR_W: .word MX25_CCM_BASE_ADDR
diff --git a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
index 0f9e813191..011de6dadf 100644
--- a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
@@ -40,11 +40,6 @@
ldr r1, =val; \
strb r1, [r0];
-/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
-
.section ".text_bare_init","ax"
ARM_PPMRR: .word 0x40000015
diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c
index 6ec74eb49b..d1b285cfaf 100644
--- a/arch/arm/boards/guf-cupid/board.c
+++ b/arch/arm/boards/guf-cupid/board.c
@@ -318,9 +318,6 @@ static int cupid_core_setup(void)
core_initcall(cupid_core_setup);
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-
static int do_cpufreq(int argc, char *argv[])
{
unsigned long freq;
diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c
index bcd2a24f8f..1a48b1d142 100644
--- a/arch/arm/boards/guf-cupid/lowlevel.c
+++ b/arch/arm/boards/guf-cupid/lowlevel.c
@@ -30,11 +30,6 @@
#include <asm-generic/memory_layout.h>
#include <asm/system.h>
-/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
-
#define SDRAM_MODE_BL_8 0x0003
#define SDRAM_MODE_BSEQ 0x0000
#define SDRAM_MODE_CL_3 0x0030
diff --git a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
index 1ad5439c28..7753568c34 100644
--- a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
@@ -30,11 +30,6 @@
#include <asm-generic/memory_layout.h>
#include <asm/system.h>
-/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
-
#define IMX35_CHIP_REVISION_2_1 0x11
#define CCM_PDR0_399 0x00011000
diff --git a/arch/arm/boards/phytec-phycore-imx35/pcm043.c b/arch/arm/boards/phytec-phycore-imx35/pcm043.c
index b83698b90a..65b592d0b5 100644
--- a/arch/arm/boards/phytec-phycore-imx35/pcm043.c
+++ b/arch/arm/boards/phytec-phycore-imx35/pcm043.c
@@ -295,9 +295,6 @@ static int pcm043_core_setup(void)
core_initcall(pcm043_core_setup);
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-
static int do_cpufreq(int argc, char *argv[])
{
unsigned long freq;
diff --git a/arch/arm/mach-imx/include/mach/imx-pll.h b/arch/arm/mach-imx/include/mach/imx-pll.h
index df7e73efea..0ccf41bcaa 100644
--- a/arch/arm/mach-imx/include/mach/imx-pll.h
+++ b/arch/arm/mach-imx/include/mach/imx-pll.h
@@ -15,4 +15,12 @@
#define IMX_PLL_MFN(x) (((x) & 0x3ff) << 0)
#define IMX_PLL_BRMO (1 << 31)
+/* Assuming 24MHz input clock */
+#define MPCTL_PARAM_532 ((1 << 31) | \
+ IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
+#define MPCTL_PARAM_399 \
+ (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
+#define PPCTL_PARAM_300 \
+ (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
+
#endif /* __INCLUDE_ASM_ARCH_IMX_PLL_H*/
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-18 00:55:03 +0000