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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2017-01-10 07:08:58 -0800 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-12 07:40:00 +0100 |
| commit | 7a8d295cdf605e2bc01c201b9998917ebaf2f46f (patch) | |
| tree | 3de2646c96321b2e104c9f312483e8a723d0a23a /arch | |
| parent | 390f49096e8b1dea250ab4439461211601e51f03 (diff) | |
| download | barebox-7a8d295cdf605e2bc01c201b9998917ebaf2f46f.tar.gz barebox-7a8d295cdf605e2bc01c201b9998917ebaf2f46f.tar.xz | |
i.MX: clk: Add IMX_PLLV3_SYS_VF610 subtype
Add IMX_PLLV3_SYS_VF610 subtype to pllv3 code to be able to control and
re-clock PLL1 and PLL2 on Vybrid SoC. This commit also introduces
imx_clk_pllv3_locked which allows the user to create PLLv3 and specify
how it should be polled for "locked" status (used in .set_rate callback)
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions