Merge branch 'for-next/pxa'

18 files changed, 343 insertions, 22 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ce8d3fdcc9..9467e0d655 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -116,6 +116,7 @@ config ARCH_OMAP
 config ARCH_PXA
 	bool "Intel/Marvell PXA based"
 	select GENERIC_GPIO
+	select HAS_POWEROFF
 
 config ARCH_SOCFPGA
 	bool "Altera SOCFPGA cyclone5"
diff --git a/arch/arm/boards/mioa701/Makefile b/arch/arm/boards/mioa701/Makefile
index 01c7a259e9..3072706237 100644
--- a/arch/arm/boards/mioa701/Makefile
+++ b/arch/arm/boards/mioa701/Makefile
@@ -1,2 +1,2 @@
-obj-y += board.o
+obj-y += board.o gpio0_poweroff.o
 lwl-y += lowlevel.o
diff --git a/arch/arm/boards/mioa701/board.c b/arch/arm/boards/mioa701/board.c
index 6c877bc00f..6f93900fdc 100644
--- a/arch/arm/boards/mioa701/board.c
+++ b/arch/arm/boards/mioa701/board.c
@@ -265,6 +265,7 @@ static int mioa701_coredevice_init(void)
 	 * This requires to command the Maxim 1586 to upgrade core voltage to
 	 * 1.475 V, on the power I2C bus (device 0x14).
 	 */
+	CKEN |= CKEN_PWRI2C;
 	CCCR = CCCR_A | 0x20290;
 	PCFR = PCFR_GPR_EN | PCFR_FVC | PCFR_DC_EN | PCFR_PI2C_EN | PCFR_OPDE;
 	PCMD(0) = PCMD_LC | 0x1f;
diff --git a/arch/arm/boards/mioa701/env/bin/barebox_update b/arch/arm/boards/mioa701/env/bin/barebox_update
index 10237709cf..632c20926a 100644
--- a/arch/arm/boards/mioa701/env/bin/barebox_update
+++ b/arch/arm/boards/mioa701/env/bin/barebox_update
@@ -1,10 +1,11 @@
 #!/bin/sh
 
 # Page+OOB specific partitions
-addpart /dev/mtd0.raw 1081344@3649536(msipl)
-addpart /dev/mtd0.raw 270336@3649536(barebox)
+addpart /dev/mtd0.raw 2162688@405504(barebox)
 
 if [ -r /barebox.BIP0 ]; then
+	dps1_unlock
 	erase /dev/mtd0.raw.barebox
-	cp -v /barebox.BIP0 /dev/mtd0.raw.barebox
+	cp -v /barebox.BIPO /dev/mtd0.raw.barebox
+	dps1_unlock
 fi
diff --git a/arch/arm/boards/mioa701/env/bin/console_mode b/arch/arm/boards/mioa701/env/bin/console_mode
new file mode 100644
index 0000000000..aa06e920b4
--- /dev/null
+++ b/arch/arm/boards/mioa701/env/bin/console_mode
@@ -0,0 +1,6 @@
+#!/bin/sh
+# Script to run barebox in console mode
+
+splash /dev/mtd0.barebox-logo2
+echo
+echo "Welcome to barebox console"
diff --git a/arch/arm/boards/mioa701/env/bin/init b/arch/arm/boards/mioa701/env/bin/init
index ab5d84d68b..e914eae32f 100644
--- a/arch/arm/boards/mioa701/env/bin/init
+++ b/arch/arm/boards/mioa701/env/bin/init
@@ -7,13 +7,55 @@ export PATH
 addpart /dev/mtd0 $mtdparts
 
 usbserial -s "Mio A701 usb gadget"
-led keyboard 0
 
-sdcard_override
+gpio_get_value 22
+is_usb_connected=$?
+
+gpio_get_value 93
+is_vol_up=$?
 
 fb0.enable=1
+# Phase1: Handle Vol-Up key case : drop immediately to console
+if [ $is_vol_up != 0 ]; then
+	console_mode
+	exit
+fi
+
+# Phase2: Handle Power-On case : debounce PowerUp key or Halt
+if [ $global.system.reset = "POR" -o $global.system.reset = "WKE" ]; then
+	powerup_released=0
+
+	gpio_get_value 0
+	is_power_up=$?
+	if [ $is_power_up = 0 ]; then
+		powerup_released=1
+	fi
+	msleep 500
+
+	gpio_get_value 0
+	is_power_up=$?
+	if [ $is_power_up = 0 ]; then
+		powerup_released=1
+	fi
+
+	if [ $powerup_released = 1 ]; then
+		echo "Power button not held, halting"
+		poweroff
+	fi
+fi
+
+# Phase3: display logo
+led keyboard 0
 splash /dev/mtd0.barebox-logo
 
+# Phase4: check for SD Card override
+sdcard_override
+if [ $? = 0 ]; then
+    console_mode
+    exit
+fi
+
+# Phase5: check for MTD override
 mtd_env_override
 if [ $? = 0 ]; then
     echo "Switching to custom environment"
@@ -21,20 +63,17 @@ if [ $? = 0 ]; then
     exit
 fi
 
+# Phase6: check for user interrupting auto-boot
 echo "No custom environment found"
-
-gpio_get_value 22
-is_usb_connected=$?
 if [ $is_usb_connected != 0 ]; then
 	echo -n "Hit any key to stop autoboot: "
 	timeout -a $autoboot_timeout
 	if [ $? != 0 ]; then
-		echo
-		echo "Welcome to barebox console"
+		console_mode
 		exit
 	fi
 fi
 
+# Phase7: auto-boot linux kernel
 echo "Booting linux kernel on docg3 chip ..."
-bootargs="$bootargs mtdparts=docg3.0:$mtdparts ubi.mtd=4 rootfstype=ubifs root=ubi0:linux_root ro"
 bootm /dev/mtd0.kernel
diff --git a/arch/arm/boards/mioa701/env/bin/sdcard_override b/arch/arm/boards/mioa701/env/bin/sdcard_override
index ab83534135..7003fa967e 100644
--- a/arch/arm/boards/mioa701/env/bin/sdcard_override
+++ b/arch/arm/boards/mioa701/env/bin/sdcard_override
@@ -12,5 +12,8 @@ if [ $mci0.probe = 1 ]; then
 	if [ -f /sdcard/barebox.env ]; then
 		loadenv /sdcard/barebox.env /env.sd
 		/env.sd/bin/init
+		exit
 	fi
 fi
+trigger_error_return_code
+exit
diff --git a/arch/arm/boards/mioa701/env/config b/arch/arm/boards/mioa701/env/config
index 2cc44fd7f9..92014511b4 100644
--- a/arch/arm/boards/mioa701/env/config
+++ b/arch/arm/boards/mioa701/env/config
@@ -2,4 +2,5 @@
 
 autoboot_timeout=3
 
-mtdparts="256k@3456k(barebox)ro,256k(barebox-logo),128k(barebox-env),4M(kernel),-(root)"
+mtdparts="2048k@384k(barebox)ro,256k(barebox-logo),256k(barebox-logo2),128k(barebox-env),5120k(kernel),-(root)"
+bootargs="$bootargs mtdparts=docg3.0:$mtdparts ubi.mtd=5 rootfstype=ubifs root=ubi0:linux_root ro"
diff --git a/arch/arm/boards/mioa701/env/data/dps1.raw.gz b/arch/arm/boards/mioa701/env/data/dps1.raw.gz
index 93112bfca1..9857c83e07 100644
--- a/arch/arm/boards/mioa701/env/data/dps1.raw.gz
+++ b/arch/arm/boards/mioa701/env/data/dps1.raw.gz
diff --git a/arch/arm/boards/mioa701/gpio0_poweroff.c b/arch/arm/boards/mioa701/gpio0_poweroff.c
new file mode 100644
index 0000000000..2054548aa6
--- /dev/null
+++ b/arch/arm/boards/mioa701/gpio0_poweroff.c
@@ -0,0 +1,81 @@
+/*
+ * (C) 2011 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <clock.h>
+#include <common.h>
+#include <init.h>
+#include <gpio.h>
+#include <poller.h>
+
+#include "mioa701.h"
+
+#define POWEROFF_SECS (4 * SECOND)
+
+static void blink_led_keyboard(void)
+{
+	gpio_set_value(GPIO115_LED_nKeyboard, 0);
+	mdelay(400);
+	gpio_set_value(GPIO115_LED_nKeyboard, 1);
+	mdelay(400);
+}
+
+static void try_poweroff(void)
+{
+	int poweroff_released = 0;
+
+	blink_led_keyboard();
+	poweroff_released |= !gpio_get_value(GPIO0_KEY_POWER);
+	if (poweroff_released)
+		return;
+
+	gpio_set_value(GPIO115_LED_nKeyboard, 0);
+	mdelay(2000);
+	poweroff();
+}
+
+static void gpio0_poller_fn(struct poller_struct *poller)
+{
+	static uint64_t gpio0_start;
+	static bool gpio0_activated;
+
+	if (!gpio_get_value(GPIO0_KEY_POWER)) {
+		gpio0_activated = false;
+		return;
+	}
+
+	if (gpio0_activated) {
+		if (is_timeout_non_interruptible(gpio0_start, POWEROFF_SECS)) {
+			try_poweroff();
+			gpio0_activated = false;
+		}
+	} else {
+		gpio0_activated = true;
+		gpio0_start = get_time_ns();
+	}
+}
+
+static struct poller_struct gpio0_poller = {
+	.func = gpio0_poller_fn,
+};
+
+static int gpio0_poweroff_probe(void)
+{
+	return poller_register(&gpio0_poller);
+}
+
+device_initcall(gpio0_poweroff_probe);
diff --git a/arch/arm/configs/mioa701_defconfig b/arch/arm/configs/mioa701_defconfig
index 5f06b3c771..841b9be54e 100644
--- a/arch/arm/configs/mioa701_defconfig
+++ b/arch/arm/configs/mioa701_defconfig
@@ -1,27 +1,46 @@
 CONFIG_ARCH_PXA=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x100000
 CONFIG_AEABI=y
+CONFIG_ARM_BOARD_APPEND_ATAG=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 # CONFIG_BANNER is not set
-CONFIG_TEXT_BASE=0xa3f00000
-CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x262144
+CONFIG_MMU=y
+CONFIG_TEXT_BASE=0xa3d00000
+CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x80000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_EXPERIMENTAL=y
+CONFIG_MODULES=y
+CONFIG_KALLSYMS=y
 CONFIG_LONGHELP=y
 CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_HUSH_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mioa701/env"
+CONFIG_RESET_SOURCE=y
 CONFIG_DEBUG_INFO=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MSLEEP=y
 CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_BASENAME=y
+CONFIG_CMD_DIRNAME=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_READLINK=y
+CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
@@ -29,24 +48,40 @@ CONFIG_CMD_LOADS=y
 CONFIG_CMD_SAVES=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MM=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
 CONFIG_CMD_FLASH=y
+CONFIG_CMD_UBIFORMAT=y
 CONFIG_CMD_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_BOOTM_VERBOSE=y
 CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_FLEXIBLE_BOOTARGS=y
+CONFIG_CMD_BOOT=y
 CONFIG_CMD_RESET=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_SPLASH=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_SPLASH=y
+CONFIG_CMD_LSMOD=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_DETECT=y
+CONFIG_OFDEVICE=y
+CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_SERIAL_PXA=y
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_DEVICE=y
 CONFIG_MTD_DOCG3=y
+CONFIG_MTD_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_VIDEO=y
@@ -55,8 +90,16 @@ CONFIG_MCI=y
 CONFIG_MCI_PXA=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_KEYBOARD_GPIO=y
 CONFIG_FS_CRAMFS=y
+CONFIG_FS_EXT4=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
+CONFIG_FS_UBIFS=y
+CONFIG_FS_UBIFS_COMPRESSION_LZO=y
+CONFIG_FS_UBIFS_COMPRESSION_ZLIB=y
 CONFIG_BZLIB=y
+CONFIG_BMP=y
+CONFIG_PNG=y
+CONFIG_SHA256=y
diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c
index 78a0242474..51bdcbf38e 100644
--- a/arch/arm/mach-imx/imx1.c
+++ b/arch/arm/mach-imx/imx1.c
@@ -30,13 +30,13 @@ static void imx1_detect_reset_source(void)
 
 	switch (val) {
 	case RSR_EXR:
-		set_reset_source(RESET_RST);
+		reset_source_set(RESET_RST);
 		return;
 	case RSR_WDR:
-		set_reset_source(RESET_WDG);
+		reset_source_set(RESET_WDG);
 		return;
 	case 0:
-		set_reset_source(RESET_POR);
+		reset_source_set(RESET_POR);
 		return;
 	default:
 		/* else keep the default 'unknown' state */
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 6a02a5459c..6ddb6e58e5 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -2,6 +2,8 @@ obj-y += clocksource.o
 obj-y += common.o
 obj-y += gpio.o
 obj-y += devices.o
+obj-y += sleep.o
 
 obj-$(CONFIG_ARCH_PXA2XX) += mfp-pxa2xx.o
 obj-$(CONFIG_ARCH_PXA27X) += speed-pxa27x.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
diff --git a/arch/arm/mach-pxa/common.c b/arch/arm/mach-pxa/common.c
index 82e81b75d9..0c114ed58e 100644
--- a/arch/arm/mach-pxa/common.c
+++ b/arch/arm/mach-pxa/common.c
@@ -16,6 +16,7 @@
  */
 
 #include <common.h>
+#include <mach/pxa-regs.h>
 #include <asm/io.h>
 
 #define OSMR3	0x40A0000C
@@ -26,8 +27,13 @@
 #define OWER_WME	(1 << 0)	/* Watch-dog Match Enable */
 #define OSSR_M3		(1 << 3)	/* Match status channel 3 */
 
+extern void pxa_suspend(int mode);
+
 void reset_cpu(ulong addr)
 {
+	/* Clear last reset source */
+	RCSR = RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR;
+
 	/* Initialize the watchdog and let it fire */
 	writel(OWER_WME, OWER);
 	writel(OSSR_M3, OSSR);
@@ -35,3 +41,14 @@ void reset_cpu(ulong addr)
 
 	while (1);
 }
+
+void __noreturn poweroff()
+{
+	shutdown_barebox();
+
+	/* Clear last reset source */
+	RCSR = RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR;
+
+	pxa_suspend(PWRMODE_DEEPSLEEP);
+	unreachable();
+}
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e53085cdde..c5f40d7c08 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -28,4 +28,8 @@
 #define cpu_is_pxa27x()	(0)
 #endif
 
+#ifdef __ASSEMBLY__
+#define __REG(x) (x)
+#endif
+
 #endif	/* !__MACH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/reset_source.c b/arch/arm/mach-pxa/reset_source.c
new file mode 100644
index 0000000000..a90584b1a6
--- /dev/null
+++ b/arch/arm/mach-pxa/reset_source.c
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2014 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <reset_source.h>
+#include <mach/pxa-regs.h>
+
+static int pxa_detect_reset_source(void)
+{
+	u32 reg = RCSR;
+
+	/*
+	 * Order is important, as many bits can be set together
+	 */
+	if (reg & RCSR_GPR)
+		reset_source_set(RESET_RST);
+	else if (reg & RCSR_WDR)
+		reset_source_set(RESET_WDG);
+	else if (reg & RCSR_HWR)
+		reset_source_set(RESET_POR);
+	else if (reg & RCSR_SMR)
+		reset_source_set(RESET_WKE);
+	else
+		reset_source_set(RESET_UKWN);
+
+	return 0;
+}
+
+device_initcall(pxa_detect_reset_source);
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
new file mode 100644
index 0000000000..881033da21
--- /dev/null
+++ b/arch/arm/mach-pxa/sleep.S
@@ -0,0 +1,81 @@
+/*
+ * Low-level PXA250/210 sleep/wakeUp support
+ *
+ * Initial SA1110 code:
+ * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
+ *
+ * Adapted for PXA by Nicolas Pitre:
+ * Copyright (c) 2002 Monta Vista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License.
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <mach/hardware.h>
+#include <mach/pxa2xx-regs.h>
+
+#define MDREFR_KDIV	0x200a4000	// all banks
+#define CCCR_SLEEP	0x00000107	// L=7 2N=2 A=0 PPDIS=0 CPDIS=0
+#define UNCACHED_PHYS_0	0
+		.text
+
+#ifdef CONFIG_ARCH_PXA27X
+/*
+ * pxa27x_finish_suspend()
+ *
+ * Forces CPU into sleep state.
+ *
+ * r0 = value for PWRMODE M field for desired sleep state
+ */
+ENTRY(pxa_suspend)
+	@ Put the processor to sleep
+	@ (also workaround for sighting 28071)
+
+	@ prepare value for sleep mode
+	mov	r1, r0				@ sleep mode
+
+	@ Intel PXA270 Specification Update notes problems sleeping
+	@ with core operating above 91 MHz
+	@ (see Errata 50, ...processor does not exit from sleep...)
+	ldr	r6, =CCCR
+	ldr	r8, [r6]		@ keep original value for resume
+
+	ldr	r7, =CCCR_SLEEP		@ prepare CCCR sleep value
+	mov	r0, #0x2		@ prepare value for CLKCFG
+
+	@ align execution to a cache line
+	b	pxa_cpu_do_suspend
+#endif
+
+
+	.ltorg
+	.align	5
+pxa_cpu_do_suspend:
+
+	@ All needed values are now in registers.
+	@ These last instructions should be in cache
+
+	@ initiate the frequency change...
+	str	r7, [r6]
+	mcr	p14, 0, r0, c6, c0, 0
+
+	@ restore the original cpu speed value for resume
+	str	r8, [r6]
+
+	@ need 6 13-MHz cycles before changing PWRMODE
+	@ just set frequency to 91-MHz... 6*91/13 = 42
+
+	mov	r0, #42
+10:	subs	r0, r0, #1
+	bne	10b
+
+	@ Do not reorder...
+	@ Intel PXA270 Specification Update notes problems performing
+	@ external accesses after SDRAM is put in self-refresh mode
+	@ (see Errata 39 ...hangs when entering self-refresh mode)
+
+	@ enter sleep mode
+	mcr	p14, 0, r1, c7, c0, 0		@ PWRMODE
+20:	b	20b				@ loop waiting for sleep
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
index 2456e3f602..c1365b2003 100644
--- a/arch/arm/mach-samsung/reset_source.c
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -29,21 +29,21 @@ static int s3c_detect_reset_source(void)
 	u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
 
 	if (reg & S3C2440_GSTATUS2_PWRST) {
-		set_reset_source(RESET_POR);
+		reset_source_set(RESET_POR);
 		writel(S3C2440_GSTATUS2_PWRST,
 					S3C_GPIO_BASE + S3C2440_GSTATUS2);
 		return 0;
 	}
 
 	if (reg & S3C2440_GSTATUS2_SLEEPRST) {
-		set_reset_source(RESET_WKE);
+		reset_source_set(RESET_WKE);
 		writel(S3C2440_GSTATUS2_SLEEPRST,
 					S3C_GPIO_BASE + S3C2440_GSTATUS2);
 		return 0;
 	}
 
 	if (reg & S3C2440_GSTATUS2_WDRST) {
-		set_reset_source(RESET_WDG);
+		reset_source_set(RESET_WDG);
 		writel(S3C2440_GSTATUS2_WDRST,
 					S3C_GPIO_BASE + S3C2440_GSTATUS2);
 		return 0;