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authorSascha Hauer <s.hauer@pengutronix.de>2012-12-18 15:22:28 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2012-12-19 21:51:49 +0100
commitb9fd320cb38ebe535cc97b07b90719abdefdc440 (patch)
tree6729254a0d3e544361bd1cf15447d439c1ea8cd1 /arch
parente412cb78053ebfe5d9546a98abcf1f671b14ca43 (diff)
downloadbarebox-b9fd320cb38ebe535cc97b07b90719abdefdc440.tar.gz
barebox-b9fd320cb38ebe535cc97b07b90719abdefdc440.tar.xz
ARM omap: Make timer base runtime configurable
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap/include/mach/timers.h4
-rw-r--r--arch/arm/mach-omap/omap3_clock.c3
-rw-r--r--arch/arm/mach-omap/omap4_clock.c1
-rw-r--r--arch/arm/mach-omap/omap4_generic.c2
-rw-r--r--arch/arm/mach-omap/s32k_clksource.c10
5 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm/mach-omap/include/mach/timers.h b/arch/arm/mach-omap/include/mach/timers.h
index 2df507d588..8e4cb929ba 100644
--- a/arch/arm/mach-omap/include/mach/timers.h
+++ b/arch/arm/mach-omap/include/mach/timers.h
@@ -47,8 +47,4 @@
/* Enable sys_clk NO-prescale /1 */
#define GPT_EN ((0 << 2) | (0x1 << 1) | (0x1 << 0))
-/** Sync 32Khz Timer registers */
-#define S32K_CR (OMAP_32KTIMER_BASE + 0x10)
-#define S32K_FREQUENCY 32768
-
#endif /*__ASM_ARCH_GPT_H */
diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c
index 975bf455a9..2a5e6f293c 100644
--- a/arch/arm/mach-omap/omap3_clock.c
+++ b/arch/arm/mach-omap/omap3_clock.c
@@ -34,10 +34,13 @@
#include <io.h>
#include <mach/silicon.h>
#include <mach/clocks.h>
+#include <mach/omap3-clock.h>
#include <mach/timers.h>
#include <mach/sys_info.h>
#include <mach/syslib.h>
+#define S32K_CR (OMAP_32KTIMER_BASE + 0x10)
+
/* Following functions are exported from omap3_clock_core.S */
/* Helper functions */
static u32 get_osc_clk_speed(void);
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index b489d595ff..c86e4e5f33 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -3,6 +3,7 @@
#include <mach/syslib.h>
#include <mach/silicon.h>
#include <mach/clocks.h>
+#include <mach/omap4-clock.h>
#define LDELAY 12000000
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index dc1dbae214..4653b17139 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -1,7 +1,7 @@
#include <common.h>
#include <init.h>
#include <io.h>
-#include <mach/clocks.h>
+#include <mach/omap4-clock.h>
#include <mach/silicon.h>
#include <mach/omap4-mux.h>
#include <mach/syslib.h>
diff --git a/arch/arm/mach-omap/s32k_clksource.c b/arch/arm/mach-omap/s32k_clksource.c
index 2cfcfa9ed6..ca73753797 100644
--- a/arch/arm/mach-omap/s32k_clksource.c
+++ b/arch/arm/mach-omap/s32k_clksource.c
@@ -31,6 +31,12 @@
#include <mach/sys_info.h>
#include <mach/syslib.h>
+/** Sync 32Khz Timer registers */
+#define S32K_CR 0x10
+#define S32K_FREQUENCY 32768
+
+static void __iomem *timerbase;
+
/**
* @brief Provide a simple clock read
*
@@ -41,7 +47,7 @@
*/
static uint64_t s32k_clocksource_read(void)
{
- return readl(S32K_CR);
+ return readl(timerbase + S32K_CR);
}
/* A bit obvious isn't it? */
@@ -62,6 +68,8 @@ static struct clocksource s32k_cs = {
*/
static int s32k_clocksource_init(void)
{
+ timerbase = (void *)OMAP_32KTIMER_BASE;
+
s32k_cs.mult = clocksource_hz2mult(S32K_FREQUENCY, s32k_cs.shift);
return init_clock(&s32k_cs);