summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorChristian Hemp <c.hemp@phytec.de>2016-04-27 12:04:44 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-05-02 08:13:00 +0200
commitcb3fc0d022316fb5a08e941744185135f10703bb (patch)
treefc11be8cf3935f3434394959fb43ab67295a114a /arch
parentc3318ae77f1cfb5e3ec2053c78518c0028e4661d (diff)
downloadbarebox-cb3fc0d022316fb5a08e941744185135f10703bb.tar.gz
barebox-cb3fc0d022316fb5a08e941744185135f10703bb.tar.xz
ARM: phytec-som-imx6: add phyCORE-i.MX6 Quad 2GiB RAM
Add new Phytec phyCORE-i.MX6 SOM: Support: - imx6q-phytec-phycore-som-emmc: - 2GiB RAM on 1 Bank with 64Bit - 1GBit Ethernet - SPI NOR - eMMC - SD - UART Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg8
-rw-r--r--arch/arm/boards/phytec-som-imx6/lowlevel.c1
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg
new file mode 100644
index 0000000000..54c9e41d28
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg
@@ -0,0 +1,8 @@
+#define SETUP_MDCFG0 \
+ wm 32 0x021b000c 0x8c929b85
+
+#define SETUP_MDASP_MDCTL \
+ wm 32 0x021b0040 0x00000047; \
+ wm 32 0x021b0000 0x841A0000
+
+#include "flash-header-phytec-pcm058.h"
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 6506e5f76e..d2d8b68b85 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -96,3 +96,4 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);