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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-08-07 06:14:59 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-08-07 06:14:59 +0200 |
commit | f1ee4e8b73a356278056666da8d0c6b5aa53088d (patch) | |
tree | 160f8440f19bd0702aed7323900e7412ea11ff0f /arch | |
parent | c138893990013fa9f3008325fdf4fd8ac0628ba2 (diff) | |
parent | 11b34ab22f4072db0cdbf605d6ffbd472618175b (diff) | |
download | barebox-f1ee4e8b73a356278056666da8d0c6b5aa53088d.tar.gz barebox-f1ee4e8b73a356278056666da8d0c6b5aa53088d.tar.xz |
Merge branch 'for-next/marvell'
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/cpu/dtb.c | 1 | ||||
-rw-r--r-- | arch/arm/dts/armada-370-mirabox-bb.dts | 3 | ||||
-rw-r--r-- | arch/arm/dts/armada-xp-openblocks-ax3-4-bb.dts | 4 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/armada-370-xp.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/common.c | 59 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/dove.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/kirkwood.c | 5 |
11 files changed, 86 insertions, 10 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2d024dc380..a3208d27e4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -102,6 +102,7 @@ config ARCH_MVEBU select GPIOLIB select HAS_DEBUG_LL select HAVE_PBL_MULTI_IMAGES + select HW_HAS_PCI select MVEBU_MBUS select OFTREE select OF_ADDRESS_PCI diff --git a/arch/arm/cpu/dtb.c b/arch/arm/cpu/dtb.c index abc3ccb4c0..ae4ff2a9ad 100644 --- a/arch/arm/cpu/dtb.c +++ b/arch/arm/cpu/dtb.c @@ -50,6 +50,7 @@ static int of_arm_init(void) root = of_unflatten_dtb(fdt); if (root) { of_set_root_node(root); + of_fix_tree(root); if (IS_ENABLED(CONFIG_OFDEVICE)) of_probe(); } diff --git a/arch/arm/dts/armada-370-mirabox-bb.dts b/arch/arm/dts/armada-370-mirabox-bb.dts index de37a75bb9..315678151a 100644 --- a/arch/arm/dts/armada-370-mirabox-bb.dts +++ b/arch/arm/dts/armada-370-mirabox-bb.dts @@ -11,9 +11,6 @@ }; soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; - internal-regs { gpio_leds { green_pwr_led { diff --git a/arch/arm/dts/armada-xp-openblocks-ax3-4-bb.dts b/arch/arm/dts/armada-xp-openblocks-ax3-4-bb.dts index 611d72707f..e88f1dc781 100644 --- a/arch/arm/dts/armada-xp-openblocks-ax3-4-bb.dts +++ b/arch/arm/dts/armada-xp-openblocks-ax3-4-bb.dts @@ -11,10 +11,6 @@ }; soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 - MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>; - internal-regs { gpio_leds { red_led { diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 18f61f74f9..131f3a67ea 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -14,11 +14,13 @@ config ARCH_ARMADA_370 bool "Armada 370" select CPU_V7 select CLOCKSOURCE_MVEBU + select PINCTRL_ARMADA_370 config ARCH_ARMADA_XP bool "Armada XP" select CPU_V7 select CLOCKSOURCE_MVEBU + select PINCTRL_ARMADA_XP config ARCH_DOVE bool "Dove 88AP510" diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index e416a38765..f2b991e5a7 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -18,6 +18,7 @@ #include <init.h> #include <io.h> #include <asm/memory.h> +#include <linux/mbus.h> #include <mach/armada-370-xp-regs.h> static inline void armada_370_xp_memory_find(unsigned long *phys_base, @@ -46,12 +47,20 @@ static inline void armada_370_xp_memory_find(unsigned long *phys_base, static int armada_370_xp_init_soc(void) { unsigned long phys_base, phys_size; + u32 reg; barebox_set_model("Marvell Armada 370/XP"); barebox_set_hostname("armada"); + /* Disable MBUS error propagation */ + reg = readl(ARMADA_370_XP_FABRIC_BASE); + reg &= ~BIT(8); + writel(reg, ARMADA_370_XP_FABRIC_BASE); + armada_370_xp_memory_find(&phys_base, &phys_size); - arm_add_mem_device("ram0", phys_base, phys_size); + + mvebu_set_memory(phys_base, phys_size); + mvebu_mbus_add_range(0xf0, 0x01, MVEBU_REMAP_INT_REG_BASE); return 0; } diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c index b054bf5aff..ac4b332e01 100644 --- a/arch/arm/mach-mvebu/common.c +++ b/arch/arm/mach-mvebu/common.c @@ -79,3 +79,62 @@ static int mvebu_soc_id_init(void) return 0; } postcore_initcall(mvebu_soc_id_init); + +static u64 mvebu_mem[2]; + +void mvebu_set_memory(u64 phys_base, u64 phys_size) +{ + mvebu_mem[0] = phys_base; + mvebu_mem[1] = phys_size; +} + +/* + * Memory size is set up by BootROM and can be read from SoC's ram controller + * registers. Fixup provided DTs to reflect accessible amount of directly + * attached RAM. Removable RAM, e.g. SODIMM, should be added by a per-board + * fixup. + */ +static int mvebu_memory_of_fixup(struct device_node *root, void *context) +{ + struct device_node *np; + __be32 reg[4]; + int na, ns; + + /* bail out on zero-sized mem */ + if (!mvebu_mem[1]) + return -ENODEV; + + np = of_find_node_by_path("/memory"); + if (!np) + np = of_create_node(root, "/memory"); + if (!np) + return -EINVAL; + + na = of_n_addr_cells(np); + ns = of_n_size_cells(np); + + if (na == 2) { + reg[0] = cpu_to_be32(mvebu_mem[0] >> 32); + reg[1] = cpu_to_be32(mvebu_mem[0] & 0xffffffff); + } else { + reg[0] = cpu_to_be32(mvebu_mem[0] & 0xffffffff); + } + + if (ns == 2) { + reg[2] = cpu_to_be32(mvebu_mem[1] >> 32); + reg[3] = cpu_to_be32(mvebu_mem[1] & 0xffffffff); + } else { + reg[1] = cpu_to_be32(mvebu_mem[1] & 0xffffffff); + } + + if (of_set_property(np, "device_type", "memory", sizeof("memory"), 1) || + of_set_property(np, "reg", reg, sizeof(u32) * (na + ns), 1)) + pr_err("Unable to fixup memory node\n"); + + return 0; +} + +static int mvebu_memory_fixup_register(void) { + return of_register_fixup(mvebu_memory_of_fixup, NULL); +} +pure_initcall(mvebu_memory_fixup_register); diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c index bcbf4b8ad7..69c6436b24 100644 --- a/arch/arm/mach-mvebu/dove.c +++ b/arch/arm/mach-mvebu/dove.c @@ -18,6 +18,7 @@ #include <init.h> #include <io.h> #include <asm/memory.h> +#include <linux/mbus.h> #include <mach/dove-regs.h> static inline void dove_remap_mc_regs(void) @@ -76,7 +77,10 @@ static int dove_init_soc(void) dove_remap_mc_regs(); dove_memory_find(&phys_base, &phys_size); - arm_add_mem_device("ram0", phys_base, phys_size); + + mvebu_set_memory(phys_base, phys_size); + mvebu_mbus_add_range(0xf0, 0x01, MVEBU_REMAP_INT_REG_BASE); + mvebu_mbus_add_range(0xf0, 0x02, DOVE_REMAP_MC_REGS); return 0; } diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h index 5fd16e5733..ccc687c03b 100644 --- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h +++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h @@ -42,6 +42,8 @@ #define DDR_SIZE_CS_SHIFT 2 #define DDR_SIZE_MASK 0xff000000 +#define ARMADA_370_XP_FABRIC_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20200) + #define ARMADA_370_XP_TIMER_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20300) #endif /* __MACH_MVEBU_DOVE_REGS_H */ diff --git a/arch/arm/mach-mvebu/include/mach/common.h b/arch/arm/mach-mvebu/include/mach/common.h index 3cc1bf71c0..9f6118e4ec 100644 --- a/arch/arm/mach-mvebu/include/mach/common.h +++ b/arch/arm/mach-mvebu/include/mach/common.h @@ -20,4 +20,6 @@ #define MVEBU_REMAP_INT_REG_BASE 0xf1000000 +void mvebu_set_memory(u64 phys_base, u64 phys_size); + #endif diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c index fe9ca9cbe4..c114bdb360 100644 --- a/arch/arm/mach-mvebu/kirkwood.c +++ b/arch/arm/mach-mvebu/kirkwood.c @@ -17,6 +17,7 @@ #include <init.h> #include <io.h> #include <asm/memory.h> +#include <linux/mbus.h> #include <mach/kirkwood-regs.h> static inline void kirkwood_memory_find(unsigned long *phys_base, @@ -50,7 +51,9 @@ static int kirkwood_init_soc(void) barebox_set_hostname("kirkwood"); kirkwood_memory_find(&phys_base, &phys_size); - arm_add_mem_device("ram0", phys_base, phys_size); + + mvebu_set_memory(phys_base, phys_size); + mvebu_mbus_add_range(0xf0, 0x01, MVEBU_REMAP_INT_REG_BASE); return 0; } |