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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-07 18:54:14 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-08 12:33:16 +0100 |
| commit | acc033704c52b4fd9ab5831df44a590c087eb8db (patch) | |
| tree | 979bcb1bc86536e8c8b863e9d3997c627dee0c47 /arch | |
| parent | 4b74753cce087fde388b419bd11a7d3e5796af87 (diff) | |
| download | barebox-acc033704c52b4fd9ab5831df44a590c087eb8db.tar.gz barebox-acc033704c52b4fd9ab5831df44a590c087eb8db.tar.xz | |
ARM v7: Fix typos in cache-armv7.S
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/cache-armv7.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S index 538ab28e63..5b8491efcf 100644 --- a/arch/arm/cpu/cache-armv7.S +++ b/arch/arm/cpu/cache-armv7.S @@ -47,7 +47,7 @@ ENTRY(__mmu_cache_off) mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB mov pc, r12 -ENDPROC(__mmu_cache_on) +ENDPROC(__mmu_cache_off) __BARE_INIT ENTRY(__mmu_cache_flush) @@ -97,7 +97,7 @@ skip: bgt loop1 finished: ldmfd sp!, {r0-r7, r9-r11} - mov r10, #0 @ swith back to cache level 0 + mov r10, #0 @ switch back to cache level 0 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr iflush: mcr p15, 0, r10, c7, c10, 4 @ DSB |