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authorLucas Stach <l.stach@pengutronix.de>2017-07-10 17:33:17 +0200
committerLucas Stach <l.stach@pengutronix.de>2017-07-20 15:10:44 +0200
commitda1abd1d5c434ac8a61ab6bce341490d6378bdfc (patch)
tree1bc0e5b4ef73db591f1a226c2e90928f3bdcdbbf /arch
parent9982ffecb8ee654601a2c847af324a2fcd6d7efd (diff)
downloadbarebox-da1abd1d5c434ac8a61ab6bce341490d6378bdfc.tar.gz
barebox-da1abd1d5c434ac8a61ab6bce341490d6378bdfc.tar.xz
ARM: imx6: move MX6UL enet setup out of CPU string setting
This is not a good place to do this ENET setup. Call the function like all the other setup functions and bail out if the SoC is not a i.MX6UL/ULL. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/imx6.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 96c1f64093..4f98bc8b3f 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -139,6 +139,9 @@ void imx6ul_enet_clk_init(void)
void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000;
uint32_t val;
+ if (!cpu_mx6_is_mx6ul() && !cpu_mx6_is_mx6ull())
+ return;
+
val = readl(gprbase + IOMUXC_GPR1);
val |= (0x3 << 17);
writel(val, gprbase + IOMUXC_GPR1);
@@ -182,7 +185,6 @@ int imx6_init(void)
break;
case IMX6_CPUTYPE_IMX6UL:
cputypestr = "i.MX6 UltraLite";
- imx6ul_enet_clk_init();
break;
case IMX6_CPUTYPE_IMX6ULL:
cputypestr = "i.MX6 ULL";
@@ -195,6 +197,7 @@ int imx6_init(void)
imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
imx6_setup_ipu_qos();
+ imx6ul_enet_clk_init();
return 0;
}