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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2013-01-27 17:40:53 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-01-27 21:26:51 +0100 |
| commit | 20947c6b7f5524eb8e645885f837700bec7e008f (patch) | |
| tree | 7286150d928f4419ac7d24ca980494be524c212e /arch | |
| parent | 9aa7dd992a8275891e796f2d8f73461436ef9ce7 (diff) | |
| download | barebox-20947c6b7f5524eb8e645885f837700bec7e008f.tar.gz barebox-20947c6b7f5524eb8e645885f837700bec7e008f.tar.xz | |
at91sam9g45: add autodetect sd/ddram size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45_devices.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h | 19 |
2 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index c4ca7c60c7..a2f26b59eb 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -15,6 +15,7 @@ #include <asm/hardware.h> #include <mach/at91_pmc.h> #include <mach/at91sam9g45_matrix.h> +#include <mach/at91sam9_ddrsdr.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/io.h> @@ -24,6 +25,9 @@ void at91_add_device_sdram(u32 size) { + if (!size) + size = at91sam9g45_get_ddram_size(1); + arm_add_mem_device("ram0", AT91_CHIPSELECT_6, size); add_mem_device("sram0", AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE); diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index c90a248fa7..f8699d7400 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -175,6 +175,25 @@ static inline u32 at91_get_ddram_size(void * __iomem base, bool is_nb) return size; } +#ifdef CONFIG_SOC_AT91SAM9G45 +static inline u32 at91sam9g45_get_ddram_size(int bank) +{ + switch (bank) { + case 0: + return at91_get_ddram_size(IOMEM(AT91SAM9G45_BASE_DDRSDRC0), false); + case 1: + return at91_get_ddram_size(IOMEM(AT91SAM9G45_BASE_DDRSDRC1), false); + default: + return 0; + } +} +#else +static inline u32 at91sam9g45_get_ddram_size(int bank) +{ + return 0; +} +#endif + #ifdef CONFIG_SOC_AT91SAM9X5 static inline u32 at91sam9x5_get_ddram_size(void) { |