Merge branch 'for-next/misc'

7 files changed, 9 insertions, 9 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 1395ad4c6f..7a8f010506 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -174,7 +174,7 @@ choice
 config CPU_LOONGSON1B
 	bool "Loongson 1B"
 	depends on SYS_HAS_CPU_LOONGSON1B
-	select CPU_LOONGSON1
+	select CPU_GS232
 	help
 	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
 	  release 2 instruction set.
@@ -235,7 +235,7 @@ config CPU_MIPS64_R2
 
 endchoice
 
-config CPU_LOONGSON1
+config CPU_GS232
 	bool
 	select CPU_MIPS32
 	select CPU_MIPSR2
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 1c10db599c..72b77adc4c 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -52,7 +52,7 @@ cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS
 cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) -Wa,-mips32r2 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) -Wa,-mips64 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) -Wa,-mips64r2 -Wa,--trap
-cflags-$(CONFIG_CPU_LOONGSON1) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) -Wa,-mips32r2 -Wa,--trap
+cflags-$(CONFIG_CPU_GS232)     += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) -Wa,-mips32r2 -Wa,--trap
 
 CPPFLAGS += -DTEXT_BASE=$(CONFIG_TEXT_BASE)
 
diff --git a/arch/mips/boards/tplink-mr3020/lowlevel.S b/arch/mips/boards/tplink-mr3020/lowlevel.S
index b96292ecc4..5844530986 100644
--- a/arch/mips/boards/tplink-mr3020/lowlevel.S
+++ b/arch/mips/boards/tplink-mr3020/lowlevel.S
@@ -17,4 +17,4 @@ ENTRY_FUNCTION(BOARD_PBL_START)
 
 	ar9331_pbl_generic_start
 
-ENTRY_FUNCTION_END(BOARD_PBL_START, tplink_mr3020, SZ_32M)
+ENTRY_FUNCTION_END(BOARD_PBL_START, ar9331_tl_mr3020, SZ_32M)
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 7485f85a14..b3660cd286 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -11,7 +11,7 @@ pbl-dtb-$(CONFIG_BOARD_DPTECHNICS_DPT_MODULE) += ar9331-dptechnics-dpt-module.dt
 pbl-dtb-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += loongson-ls1b.dtb.o
 pbl-dtb-$(CONFIG_BOARD_QEMU_MALTA) += qemu-malta.dtb.o
 pbl-dtb-$(CONFIG_BOARD_RZX50) += rzx50.dtb.o
-pbl-dtb-$(CONFIG_BOARD_TPLINK_MR3020) += tplink-mr3020.dtb.o
+pbl-dtb-$(CONFIG_BOARD_TPLINK_MR3020) += ar9331_tl_mr3020.dtb.o
 pbl-dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += ar9344-tl-wdr4300-v1.7.dtb.o
 
 clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/ar9331_tl_mr3020.dts
index c6ae154f4f..c6ae154f4f 100644
--- a/arch/mips/dts/tplink-mr3020.dts
+++ b/arch/mips/dts/ar9331_tl_mr3020.dts
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index e0bb78ea61..9d94eb346b 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -41,7 +41,7 @@
  * These are valid when 23:16 == PRID_COMP_LEGACY
  */
 
-#define PRID_IMP_LOONGSON1	0x4200
+#define PRID_IMP_GS232	0x4200
 
 #define PRID_IMP_UNKNOWN	0xff00
 
@@ -109,7 +109,7 @@ enum cpu_type_enum {
 	CPU_74K,
 	CPU_BMIPS3300,
 	CPU_JZRISC,
-	CPU_LOONGSON1,
+	CPU_GS232,
 
 	CPU_LAST
 };
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index ddabddd466..cbde43a595 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -83,10 +83,10 @@ static void decode_configs(struct cpuinfo_mips *c)
 static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
 {
 	switch (c->processor_id & PRID_IMP_MASK) {
-	case PRID_IMP_LOONGSON1:
+	case PRID_IMP_GS232:
 		decode_configs(c);
 
-		c->cputype = CPU_LOONGSON1;
+		c->cputype = CPU_GS232;
 
 		switch (c->processor_id & PRID_REV_MASK) {
 		case PRID_REV_LOONGSON1B: