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author | Lucas Stach <l.stach@pengutronix.de> | 2018-11-01 10:18:38 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-02 07:24:15 +0100 |
commit | 41292192c01bc17b7c53642d66e434ce24eb3f25 (patch) | |
tree | 16dfa395048517791995147d0a6328e8a85c0ff6 /arch | |
parent | d34e8630185179ebf7ccbdbd15f2dc7d44486476 (diff) | |
download | barebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.gz barebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.xz |
ARM: safely switch from HYP to SVC mode if required
This is a port of the Linux safe_svcmode_maskall macro to
the Barebox lowlevel init.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Roland Hieber <r.hieber@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/lowlevel.S | 18 | ||||
-rw-r--r-- | arch/arm/include/asm/system.h | 26 |
2 files changed, 41 insertions, 3 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index 7696a198e7..43665981e4 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -1,16 +1,28 @@ #include <linux/linkage.h> #include <init.h> #include <asm/system.h> +#include <asm/opcodes-virt.h> .section ".text_bare_init_","ax" ENTRY(arm_cpu_lowlevel_init) /* save lr, since it may be banked away with a processor mode change */ mov r2, lr + /* set the cpu to SVC32 mode, mask irq and fiq */ mrs r12, cpsr - bic r12, r12, #0x1f - orr r12, r12, #0xd3 - msr cpsr, r12 + eor r12, r12, #HYP_MODE + tst r12, #MODE_MASK + bic r12, r12, #MODE_MASK + orr r12, r12, #(PSR_I_BIT | PSR_F_BIT | SVC_MODE) +THUMB( orr r12, r12, #PSR_T_BIT ) + bne 1f + orr r12, r12, #PSR_A_BIT + adr lr, 2f + msr spsr_cxsf, r12 + __MSR_ELR_HYP(14) + __ERET +1: msr cpsr_c, r12 +2: #if __LINUX_ARM_ARCH__ >= 6 /* diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 5cf828ea36..48242ab473 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -60,6 +60,32 @@ #define CR_AFE (1 << 29) /* Access flag enable */ #define CR_TE (1 << 30) /* Thumb exception enable */ +/* + * PSR bits + */ +#define USR_MODE 0x00000010 +#define FIQ_MODE 0x00000011 +#define IRQ_MODE 0x00000012 +#define SVC_MODE 0x00000013 +#define ABT_MODE 0x00000017 +#define HYP_MODE 0x0000001a +#define UND_MODE 0x0000001b +#define SYSTEM_MODE 0x0000001f +#define MODE32_BIT 0x00000010 +#define MODE_MASK 0x0000001f + +#define PSR_T_BIT 0x00000020 +#define PSR_F_BIT 0x00000040 +#define PSR_I_BIT 0x00000080 +#define PSR_A_BIT 0x00000100 +#define PSR_E_BIT 0x00000200 +#define PSR_J_BIT 0x01000000 +#define PSR_Q_BIT 0x08000000 +#define PSR_V_BIT 0x10000000 +#define PSR_C_BIT 0x20000000 +#define PSR_Z_BIT 0x40000000 +#define PSR_N_BIT 0x80000000 + #ifndef __ASSEMBLY__ #if __LINUX_ARM_ARCH__ >= 7 static inline unsigned int current_el(void) |