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authorAlexander Shiyan <shc_work@mail.ru>2012-04-19 00:02:44 +0400
committerSascha Hauer <s.hauer@pengutronix.de>2012-04-19 08:47:49 +0200
commit4ff04d65030df8350217af9f0a8bba1024c211d4 (patch)
tree49899a6168f701bc5dd5518db6ae4619f201b206 /arch
parent12b96ed87e9f2c50e98fbba35ead4c3e0b244ac4 (diff)
downloadbarebox-4ff04d65030df8350217af9f0a8bba1024c211d4.tar.gz
barebox-4ff04d65030df8350217af9f0a8bba1024c211d4.tar.xz
Merge silicon definitions i.MX35, i.MX51 and i.MX53
Also definition can be modified in arch/arm/boards/pcm043/lowlevel.c, but I am not sure is we can call imx_silicon_revision() from board_init_lowlevel(). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boards/freescale-mx51-pdk/board.c2
-rw-r--r--arch/arm/mach-imx/imx35.c3
-rw-r--r--arch/arm/mach-imx/imx51.c12
-rw-r--r--arch/arm/mach-imx/include/mach/generic.h3
-rw-r--r--arch/arm/mach-imx/include/mach/imx-regs.h8
-rw-r--r--arch/arm/mach-imx/include/mach/imx51-regs.h13
6 files changed, 17 insertions, 24 deletions
diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index f5e0da78cf..3b1b5741db 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -141,7 +141,7 @@ static void babbage_power_init(void)
/* power up the system first */
mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
- if (imx_silicon_revision() < MX51_CHIP_REV_3_0) {
+ if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
/* Set core voltage to 1.1V */
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
val &= ~0x1f;
diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c
index 381a564580..fe0c99ea72 100644
--- a/arch/arm/mach-imx/imx35.c
+++ b/arch/arm/mach-imx/imx35.c
@@ -37,7 +37,8 @@ int imx_silicon_revision()
{
uint32_t reg;
reg = readl(IMX_IIM_BASE + IIM_SREV);
- reg += IMX35_CHIP_REVISION_1_0;
+ /* 0×00 = TO 1.0, First silicon */
+ reg += IMX_CHIP_REV_1_0;
return (reg & 0xFF);
}
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index 4cfd03bb52..25cc6dae5d 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -20,8 +20,8 @@
#include <sizes.h>
#include <environment.h>
#include <io.h>
-#include <mach/imx51-regs.h>
#include <mach/imx5.h>
+#include <mach/imx-regs.h>
#include <mach/clock-imx51_53.h>
#include "gpio.h"
@@ -53,19 +53,19 @@ static int query_silicon_revision(void)
rev = readl(rom + SI_REV);
switch (rev) {
case 0x1:
- mx51_silicon_revision = MX51_CHIP_REV_1_0;
+ mx51_silicon_revision = IMX_CHIP_REV_1_0;
mx51_rev_string = "1.0";
break;
case 0x2:
- mx51_silicon_revision = MX51_CHIP_REV_1_1;
+ mx51_silicon_revision = IMX_CHIP_REV_1_1;
mx51_rev_string = "1.1";
break;
case 0x10:
- mx51_silicon_revision = MX51_CHIP_REV_2_0;
+ mx51_silicon_revision = IMX_CHIP_REV_2_0;
mx51_rev_string = "2.0";
break;
case 0x20:
- mx51_silicon_revision = MX51_CHIP_REV_3_0;
+ mx51_silicon_revision = IMX_CHIP_REV_3_0;
mx51_rev_string = "3.0";
break;
default:
@@ -194,7 +194,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz)
imx5_init_lowlevel();
/* disable write combine for TO 2 and lower revs */
- if (imx_silicon_revision() < MX51_CHIP_REV_3_0) {
+ if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
__asm__ __volatile__("mrc 15, 1, %0, c9, c0, 1":"=r"(r));
r |= (1 << 25);
__asm__ __volatile__("mcr 15, 1, %0, c9, c0, 1" : : "r"(r));
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index 8ff04fbc81..930d52c642 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -3,9 +3,6 @@ int imx_silicon_revision(void);
#define IMX27_CHIP_REVISION_1_0 0
#define IMX27_CHIP_REVISION_2_0 1
-#define IMX35_CHIP_REVISION_1_0 0x10
-#define IMX35_CHIP_REVISION_2_0 0x20
-
u64 imx_uid(void);
diff --git a/arch/arm/mach-imx/include/mach/imx-regs.h b/arch/arm/mach-imx/include/mach/imx-regs.h
index 789397efcb..5bd5182ab5 100644
--- a/arch/arm/mach-imx/include/mach/imx-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx-regs.h
@@ -107,7 +107,15 @@
/* silicon revisions */
#define IMX_CHIP_REV_1_0 0x10
+#define IMX_CHIP_REV_1_1 0x11
+#define IMX_CHIP_REV_1_2 0x12
+#define IMX_CHIP_REV_1_3 0x13
#define IMX_CHIP_REV_2_0 0x20
#define IMX_CHIP_REV_2_1 0x21
+#define IMX_CHIP_REV_2_2 0x22
+#define IMX_CHIP_REV_2_3 0x23
+#define IMX_CHIP_REV_3_0 0x30
+#define IMX_CHIP_REV_3_1 0x31
+#define IMX_CHIP_REV_3_2 0x32
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/mach-imx/include/mach/imx51-regs.h b/arch/arm/mach-imx/include/mach/imx51-regs.h
index 90e81cb6ff..3eb0a1f894 100644
--- a/arch/arm/mach-imx/include/mach/imx51-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx51-regs.h
@@ -130,17 +130,4 @@
#define MX51_CS4_BASE_ADDR 0xCC000000
#define MX51_CS5_BASE_ADDR 0xCE000000
-/* silicon revisions specific to i.MX51 */
-#define MX51_CHIP_REV_1_0 0x10
-#define MX51_CHIP_REV_1_1 0x11
-#define MX51_CHIP_REV_1_2 0x12
-#define MX51_CHIP_REV_1_3 0x13
-#define MX51_CHIP_REV_2_0 0x20
-#define MX51_CHIP_REV_2_1 0x21
-#define MX51_CHIP_REV_2_2 0x22
-#define MX51_CHIP_REV_2_3 0x23
-#define MX51_CHIP_REV_3_0 0x30
-#define MX51_CHIP_REV_3_1 0x31
-#define MX51_CHIP_REV_3_2 0x32
-
#endif /* __MACH_IMX51_REGS_H */