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| author | Lucas Stach <l.stach@pengutronix.de> | 2018-11-01 10:18:43 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-05 17:03:30 +0100 |
| commit | 6189e2546414830b2700eab7b09f4a6848d88850 (patch) | |
| tree | 03252a86b3f615622a15c149b86fcae461c0c12e /arch | |
| parent | 45ea4b2008613121df466e14c58c7d090f1b44a4 (diff) | |
| download | barebox-6189e2546414830b2700eab7b09f4a6848d88850.tar.gz barebox-6189e2546414830b2700eab7b09f4a6848d88850.tar.xz | |
ARM: install HYP vectors at PBL and Barebox entry
If the CPU was already in HYP mode when entering the PBL, install a
simple trap handler to allow to get back from SVC to HYP before
switching to HYP mode.
As the vectors are part of the currently running binary, we need to
do the same setup when starting the real Barebox binary, as the PBL
setup vectors might get overwritten. To do this we trap into HYP mode
just before jumping to Barebox and then re-do the vector setup and
SVC switch as the first thing in Barebox proper.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Roland Hieber <r.hieber@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/lowlevel.S | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/start-pbl.c | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/start.c | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/uncompress.c | 4 |
4 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index 43665981e4..3b52644e43 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -8,6 +8,11 @@ ENTRY(arm_cpu_lowlevel_init) /* save lr, since it may be banked away with a processor mode change */ mov r2, lr +#ifdef CONFIG_CPU_32v7 + /* careful: the hyp install corrupts r0 and r1 */ + bl __hyp_install +#endif + /* set the cpu to SVC32 mode, mask irq and fiq */ mrs r12, cpsr eor r12, r12, #HYP_MODE diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c index 16159d7f9d..48a8086456 100644 --- a/arch/arm/cpu/start-pbl.c +++ b/arch/arm/cpu/start-pbl.c @@ -26,6 +26,7 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> +#include <asm/secure.h> #include <asm/cache.h> #include <asm/mmu.h> #include <asm/unaligned.h> @@ -98,5 +99,8 @@ __noreturn void barebox_single_pbl_start(unsigned long membase, else barebox = (void *)barebox_base; + if (IS_ENABLED(CONFIG_CPU_V7) && __boot_cpu_mode == HYP_MODE) + armv7_switch_to_hyp(); + barebox(membase, memsize, boarddata); } diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 64bd942ad7..a79d64eaa6 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -24,6 +24,7 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> +#include <asm/secure.h> #include <asm/unaligned.h> #include <asm/cache.h> #include <asm/mmu.h> @@ -147,6 +148,10 @@ __noreturn void barebox_non_pbl_start(unsigned long membase, unsigned long barebox_base = arm_mem_barebox_image(membase, endmem, barebox_size); + + if (IS_ENABLED(CONFIG_CPU_V7)) + armv7_hyp_install(); + if (IS_ENABLED(CONFIG_RELOCATABLE)) relocate_to_adr(barebox_base); diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c index 43b49b4212..048bca0c95 100644 --- a/arch/arm/cpu/uncompress.c +++ b/arch/arm/cpu/uncompress.c @@ -27,6 +27,7 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> +#include <asm/secure.h> #include <asm/cache.h> #include <asm/mmu.h> #include <asm/unaligned.h> @@ -105,5 +106,8 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase, pr_debug("jumping to uncompressed image at 0x%p\n", barebox); + if (IS_ENABLED(CONFIG_CPU_V7) && __boot_cpu_mode == HYP_MODE) + armv7_switch_to_hyp(); + barebox(membase, memsize, boarddata); } |