Merge branch 'for-next/imx'

21 files changed, 1075 insertions, 514 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index c5dc41526b..fc883e3dea 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -156,6 +156,7 @@ obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
 obj-$(CONFIG_MACH_WARP7)			+= element14-warp7/
 obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
 obj-$(CONFIG_MACH_XILINX_ZCU104)		+= xilinx-zcu104/
+obj-$(CONFIG_MACH_ZII_COMMON)			+= zii-common/
 obj-$(CONFIG_MACH_ZII_RDU1)			+= zii-imx51-rdu1/
 obj-$(CONFIG_MACH_ZII_RDU2)			+= zii-imx6q-rdu2/
 obj-$(CONFIG_MACH_ZII_IMX8MQ_DEV)		+= zii-imx8mq-dev/
diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c
index e06b3d70ce..95ae49cb08 100644
--- a/arch/arm/boards/kindle3/kindle3.c
+++ b/arch/arm/boards/kindle3/kindle3.c
@@ -152,6 +152,7 @@ static int kindle3_devices_init(void)
 }
 device_initcall(kindle3_devices_init);
 
+#define FIVEWAY_PAD_CTL (PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_DVS)
 static iomux_v3_cfg_t kindle3_pads[] = {
 	/* UART1 */
 	MX35_PAD_RXD1__UART1_RXD_MUX,
@@ -183,12 +184,11 @@ static iomux_v3_cfg_t kindle3_pads[] = {
 	MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY,
 
 	/* fiveway device: up, down, left, right, select */
-	MX35_PAD_ATA_DATA14__GPIO2_27,
-	MX35_PAD_ATA_DATA15__GPIO2_28,
-	MX35_PAD_TX5_RX0__GPIO1_10,
-	MX35_PAD_ATA_BUFF_EN__GPIO2_30,
-	IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1,
-		  PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_DVS),
+	IOMUX_PAD(0x718, 0x2b4, 5, 0x8b4, 1, FIVEWAY_PAD_CTL),
+	IOMUX_PAD(0x71c, 0x2b8, 5, 0x8b8, 1, FIVEWAY_PAD_CTL),
+	IOMUX_PAD(0x59c, 0x158, 5, 0x830, 0, FIVEWAY_PAD_CTL),
+	IOMUX_PAD(0x724, 0x2c0, 5, 0x8c4, 1, FIVEWAY_PAD_CTL),
+	IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1, FIVEWAY_PAD_CTL),
 
 	/* Volume keys: up, down */
 	MX35_PAD_SCKR__GPIO1_4,
diff --git a/arch/arm/boards/zii-common/Makefile b/arch/arm/boards/zii-common/Makefile
new file mode 100644
index 0000000000..fcc5cdf97d
--- /dev/null
+++ b/arch/arm/boards/zii-common/Makefile
@@ -0,0 +1 @@
+obj-y += board.o switch-cmd.o pn-fixup.o
diff --git a/arch/arm/boards/zii-common/board.c b/arch/arm/boards/zii-common/board.c
new file mode 100644
index 0000000000..20ec64d2d4
--- /dev/null
+++ b/arch/arm/boards/zii-common/board.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2019 Zodiac Inflight Innovation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <globalvar.h>
+#include <init.h>
+#include <fs.h>
+
+static int rdu_networkconfig(void)
+{
+	static char *rdu_netconfig;
+	struct device_d *sp_dev;
+
+	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx51-rdu1"))
+		return 0;
+
+	sp_dev = get_device_by_name("sp");
+	if (!sp_dev) {
+		pr_warn("no sp device found, network config not available!\n");
+		return -ENODEV;
+	}
+
+	rdu_netconfig = basprintf("ip=%s:::%s::eth0:",
+				  dev_get_param(sp_dev, "ipaddr"),
+				  dev_get_param(sp_dev, "netmask"));
+
+	globalvar_add_simple_string("linux.bootargs.rdu_network",
+				    &rdu_netconfig);
+
+	return 0;
+}
+late_initcall(rdu_networkconfig);
+
+#define I210_CFGWORD_PCIID_157B		0x157b1a11
+static int rdu_i210_invm(void)
+{
+	int fd;
+	u32 val;
+
+	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx8mq-ultra"))
+		return 0;
+
+	fd = open("/dev/e1000-invm0", O_RDWR);
+	if (fd < 0) {
+		pr_err("could not open e1000 iNVM device!\n");
+		return fd;
+	}
+
+	pread(fd, &val, sizeof(val), 0);
+	if (val == I210_CFGWORD_PCIID_157B) {
+		pr_debug("i210 already programmed correctly\n");
+		return 0;
+	}
+
+	val = I210_CFGWORD_PCIID_157B;
+	pwrite(fd, &val, sizeof(val), 0);
+
+	return 0;
+}
+late_initcall(rdu_i210_invm);
diff --git a/arch/arm/boards/zii-common/pn-fixup.c b/arch/arm/boards/zii-common/pn-fixup.c
new file mode 100644
index 0000000000..a665199917
--- /dev/null
+++ b/arch/arm/boards/zii-common/pn-fixup.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2019 Zodiac Inflight Innovation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <linux/nvmem-consumer.h>
+
+#include "pn-fixup.h"
+
+char *zii_read_part_number(const char *cell_name, size_t cell_size)
+{
+	struct device_node *np;
+
+	np = of_find_node_by_name(NULL, "device-info");
+	if (!np) {
+		pr_warn("No device information found\n");
+		return ERR_PTR(-ENOENT);
+	}
+
+	return nvmem_cell_get_and_read(np, cell_name, cell_size);
+}
diff --git a/arch/arm/boards/zii-common/pn-fixup.h b/arch/arm/boards/zii-common/pn-fixup.h
new file mode 100644
index 0000000000..39b848bd00
--- /dev/null
+++ b/arch/arm/boards/zii-common/pn-fixup.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2019 Zodiac Inflight Innovation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ZII_PN_FIXUP__
+#define __ZII_PN_FIXUP__
+
+struct zii_pn_fixup {
+	const char *pn;
+	void (*callback) (const struct zii_pn_fixup *fixup);
+};
+
+char *zii_read_part_number(const char *, size_t);
+/**
+ * __zii_process_fixups - Process array of ZII part number based fixups
+ *
+ * @__fixups: Array of part number base fixups
+ * @__cell_name: Name of the NVMEM cell containing the part number
+ * @__cell_size: Size of the NVMEM cell containing the part number
+ *
+ * NOTE: Keeping this code as a marcro allows us to avoid restricting
+ * the type of __fixups to an array of struct zii_pn_fixup. This is
+ * really convenient becuase it allows us to do things like
+ *
+ * struct zii_foo_fixup {
+ * 	struct zii_pn_fixup parent;
+ *	type1 custom_field_1
+ *	type2 custom_field_2
+ *      ...
+ * };
+ *
+ * ...
+ *
+ * const struct zii_foo_fixup foo_fixups[] = {
+ * 	{ fixup1 },
+ * 	{ fixup2 },
+ * 	{ fixup3 },
+ * };
+ *
+ * ...
+ *
+ * __zii_process_fixups(foo_fixups, "blah", BLAH_LENGTH);
+ *
+ * which allows us to have the most compact definition of array of
+ * fixups
+ */
+#define __zii_process_fixups(__fixups, __cell_name, __cell_size)	\
+	do {								\
+		char *__pn = zii_read_part_number(__cell_name,		\
+						  __cell_size);		\
+		const struct zii_pn_fixup *__fixup;			\
+		unsigned int __i;					\
+		bool __match_found = false;				\
+									\
+		if (WARN_ON(IS_ERR(__pn)))				\
+			break;						\
+									\
+		for (__i = 0; __i < ARRAY_SIZE(__fixups); __i++) {	\
+			__fixup =					\
+			  (const struct zii_pn_fixup *) &__fixups[__i]; \
+									\
+			if (strstr(__pn, __fixup->pn)) {		\
+				pr_debug("%s->%pS\n", __func__,		\
+					 __fixup->callback);		\
+				__match_found = true;			\
+				__fixup->callback(__fixup);		\
+			}						\
+		}							\
+		if (!__match_found)					\
+			pr_err("No config fixups found for P/N %s!\n", __pn); \
+		free(__pn);						\
+	} while (0)
+
+#define DDS_PART_NUMBER_SIZE	15
+#define LRU_PART_NUMBER_SIZE	15
+
+#define zii_process_dds_fixups(_fixups)		\
+	__zii_process_fixups(_fixups, "dds-part-number", DDS_PART_NUMBER_SIZE)
+
+#define zii_process_lru_fixups(_fixups)		\
+	__zii_process_fixups(_fixups, "lru-part-number", LRU_PART_NUMBER_SIZE)
+
+#endif	/* __ZII_PN_FIXUP__ */
diff --git a/arch/arm/boards/zii-imx6q-rdu2/switch-cmd.c b/arch/arm/boards/zii-common/switch-cmd.c
index bdba46fb36..30438053a1 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/switch-cmd.c
+++ b/arch/arm/boards/zii-common/switch-cmd.c
@@ -11,19 +11,16 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <common.h>
 #include <command.h>
+#include <common.h>
 #include <i2c/i2c.h>
+#include <linux/mfd/rave-sp.h>
 
-static int do_rave_switch_reset(int argc, char *argv[])
+static int do_rdu2_switch_reset(void)
 {
 	struct i2c_client client;
 	u8 reg;
 
-	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
-	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
-		return -ENODEV;
-
 	client.adapter = i2c_get_adapter(1);
 	if (!client.adapter)
 		return -ENODEV;
@@ -42,8 +39,35 @@ static int do_rave_switch_reset(int argc, char *argv[])
 	return 0;
 }
 
+static int do_rdu1_switch_reset(void)
+{
+	struct device_d *sp_dev = get_device_by_name("sp");
+	struct rave_sp *sp = sp_dev->priv;
+	u8 cmd[] = {
+		[0] = RAVE_SP_CMD_RESET_ETH_SWITCH,
+		[1] = 0
+	};
+
+	if (IS_ENABLED(CONFIG_RAVE_SP_CORE))
+		return rave_sp_exec(sp, cmd, sizeof(cmd), NULL, 0);
+	else
+		return -ENODEV;
+}
+
+static int do_rave_switch_reset(int argc, char *argv[])
+{
+	if (of_machine_is_compatible("zii,imx6q-zii-rdu2") ||
+	    of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+		return do_rdu2_switch_reset();
+
+	if (of_machine_is_compatible("zii,imx51-rdu1"))
+		return do_rdu1_switch_reset();
+
+	return -ENODEV;
+}
+
 BAREBOX_CMD_START(rave_reset_switch)
 	.cmd		= do_rave_switch_reset,
-	BAREBOX_CMD_DESC("reset ethernet switch on RDU2")
+	BAREBOX_CMD_DESC("reset ethernet switch on RDU")
 	BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP)
 BAREBOX_CMD_END
diff --git a/arch/arm/boards/zii-imx6q-rdu2/Makefile b/arch/arm/boards/zii-imx6q-rdu2/Makefile
index 10dfba3a3c..c6285362f2 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/Makefile
+++ b/arch/arm/boards/zii-imx6q-rdu2/Makefile
@@ -1,3 +1,3 @@
-obj-y += board.o switch-cmd.o
+obj-y += board.o
 lwl-y += lowlevel.o
 bbenv-y += defaultenv-rdu2
diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index 6352f49c5a..6adb0b1c6f 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -23,6 +23,30 @@
 #include <mach/imx6.h>
 #include <net.h>
 #include <linux/nvmem-consumer.h>
+#include "../zii-common/pn-fixup.h"
+
+enum rdu2_lcd_interface_type {
+	IT_SINGLE_LVDS,
+	IT_DUAL_LVDS,
+	IT_EDP
+};
+
+enum rdu2_lvds_busformat {
+	BF_NONE,
+	BF_JEIDA,
+	BF_SPWG
+};
+
+#define RDU2_LRU_FLAG_EGALAX	BIT(0)
+#define RDU2_LRU_FLAG_NO_FEC	BIT(1)
+
+struct rdu2_lru_fixup {
+	struct zii_pn_fixup fixup;
+	unsigned int flags;
+	enum rdu2_lcd_interface_type type;
+	enum rdu2_lvds_busformat bus_format;
+	const char *compatible;
+};
 
 #define RDU2_DAC1_RESET	IMX_GPIO_NR(1, 0)
 #define RDU2_DAC2_RESET	IMX_GPIO_NR(1, 2)
@@ -190,31 +214,254 @@ static int rdu2_ethernet_init(void)
 }
 late_initcall(rdu2_ethernet_init);
 
-#define I210_CFGWORD_PCIID_157B	0x157b1a11
-static int rdu2_i210_invm(void)
+static int rdu2_fixup_egalax_ts(struct device_node *root, void *context)
 {
-	int fd;
-	u32 val;
+	struct device_node *np;
 
-	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
-	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
-		return 0;
+	/*
+	 * The 32" unit has a EETI eGalax touchscreen instead of the
+	 * Synaptics RMI4 found on other units.
+	 */
+	pr_info("Enabling eGalax touchscreen instead of RMI4\n");
 
-	fd = open("/dev/e1000-invm0", O_RDWR);
-	if (fd < 0) {
-		pr_err("could not open e1000 iNVM device!\n");
-		return fd;
+	np = of_find_compatible_node(root, NULL, "syna,rmi4-i2c");
+	if (!np)
+		return -ENODEV;
+
+	of_device_disable(np);
+
+	np = of_find_compatible_node(root, NULL, "eeti,exc3000");
+	if (!np)
+		return -ENODEV;
+
+	of_device_enable(np);
+	of_property_write_u32(np->parent, "clock-frequency", 200000);
+
+
+	return 0;
+}
+
+static int rdu2_fixup_dsa(struct device_node *root, void *context)
+{
+	struct device_node *switch_np, *np;
+	phandle i210_handle;
+
+	/*
+	 * The 12.1" unit has no FEC connection, so we need to rewrite
+	 * the i210 port into the CPU port and delete the FEC port,
+	 * which is part of the common setup.
+	 */
+	pr_info("Rewriting i210 switch port into CPU port\n");
+
+	switch_np = of_find_compatible_node(root, NULL, "marvell,mv88e6085");
+	if (!switch_np)
+		return -ENODEV;
+
+	np = of_find_node_by_name(switch_np, "port@2");
+	if (!np)
+		return -ENODEV;
+
+	of_delete_node(np);
+
+	np = of_find_node_by_name(root, "i210@0");
+	if (!np)
+		return -ENODEV;
+
+	i210_handle = of_node_create_phandle(np);
+
+	np = of_find_node_by_name(switch_np, "port@0");
+	if (!np)
+		return -ENODEV;
+
+	of_property_write_u32(np, "ethernet", i210_handle);
+	of_property_write_string(np, "label", "cpu");
+
+	return 0;
+}
+
+static int rdu2_fixup_edp(struct device_node *root)
+{
+	const bool kernel_fixup = root != NULL;
+	struct device_node *np;
+
+	if (kernel_fixup) {
+		/*
+		 * Kernel DT fixup needs this additional step
+		 */
+		pr_info("Found eDP display, enabling parallel output "
+			"and eDP bridge.\n");
+		np = of_find_compatible_node(root, NULL,
+					     "fsl,imx-parallel-display");
+		if (!np)
+			return -ENODEV;
+
+		of_device_enable(np);
 	}
 
-	pread(fd, &val, sizeof(val), 0);
-	if (val == I210_CFGWORD_PCIID_157B) {
-		pr_debug("i210 already programmed correctly\n");
-		return 0;
+	np = of_find_compatible_node(root, NULL, "toshiba,tc358767");
+	if (!np)
+		return -ENODEV;
+
+	of_device_enable(np);
+
+	return 0;
+}
+
+static int rdu2_fixup_lvds(struct device_node *root,
+			   const struct rdu2_lru_fixup *fixup)
+{
+	const bool kernel_fixup = root != NULL;
+	struct device_node *np;
+
+	/*
+	 * LVDS panels need the correct compatible
+	 */
+	pr_info("Found LVDS display, enabling %s channel LDB and "
+		"panel with compatible \"%s\".\n",
+		fixup->type == IT_DUAL_LVDS ? "dual" : "single",
+		fixup->compatible);
+	/*
+	 * LVDS panels need the correct timings
+	 */
+	np = of_find_node_by_name(root, "panel");
+	if (!np)
+		return -ENODEV;
+
+	if (kernel_fixup) {
+		of_device_enable(np);
+		of_property_write_string(np, "compatible", fixup->compatible);
+	} else {
+		struct device_node *child, *tmp;
+
+		of_device_enable_and_register(np);
+		/*
+		 * Delete all mode entries, which aren't suited for the
+		 * current display
+		 */
+		np = of_find_node_by_name(np, "display-timings");
+		if (!np)
+			return -ENODEV;
+
+		for_each_child_of_node_safe(np, tmp, child) {
+			if (!of_device_is_compatible(child,
+						     fixup->compatible))
+				of_delete_node(child);
+		}
 	}
+	/*
+	 * enable LDB channel 0 and set correct interface mode
+	 */
+	np = of_find_compatible_node(root, NULL, "fsl,imx6q-ldb");
+	if (!np)
+		return -ENODEV;
+
+	if (kernel_fixup)
+		of_device_enable(np);
+	else
+		of_device_enable_and_register(np);
+
+	if (fixup->type == IT_DUAL_LVDS)
+		of_set_property(np, "fsl,dual-channel", NULL, 0, 1);
+
+	np = of_find_node_by_name(np, "lvds-channel@0");
+	if (!np)
+		return -ENODEV;
+
+	of_device_enable(np);
+
+	if (!kernel_fixup) {
+		of_property_write_string(np, "fsl,data-mapping",
+					 fixup->bus_format == BF_SPWG ?
+					 "spwg" : "jeida");
+	}
+
+	return 0;
+}
+
+static int rdu2_fixup_display(struct device_node *root, void *context)
+{
+	const struct rdu2_lru_fixup *fixup = context;
+	/*
+	 * If the panel is eDP, just enable the parallel output and
+	 * eDP bridge
+	 */
+	if (fixup->type == IT_EDP)
+		return rdu2_fixup_edp(root);
+
+	return rdu2_fixup_lvds(root, context);
+}
+
+static void rdu2_lru_fixup(const struct zii_pn_fixup *context)
+{
+	const struct rdu2_lru_fixup *fixup =
+		container_of(context, struct rdu2_lru_fixup, fixup);
+
+	WARN_ON(rdu2_fixup_display(NULL, (void *)context));
+	of_register_fixup(rdu2_fixup_display, (void *)context);
+
+	if (fixup->flags & RDU2_LRU_FLAG_EGALAX)
+		of_register_fixup(rdu2_fixup_egalax_ts, NULL);
+
+	if (fixup->flags & RDU2_LRU_FLAG_NO_FEC)
+		of_register_fixup(rdu2_fixup_dsa, NULL);
+}
+
+#define RDU2_LRU_FIXUP(__pn, __flags, __panel)		\
+	{						\
+		{ __pn, rdu2_lru_fixup },		\
+		__flags,				\
+		__panel					\
+	}
+
+#define RDU2_PANEL_10P1	IT_SINGLE_LVDS, BF_SPWG,  "innolux,g121i1-l01"
+#define RDU2_PANEL_11P6	IT_EDP,         BF_NONE,  NULL
+#define RDU2_PANEL_12P1	IT_SINGLE_LVDS, BF_SPWG,  "nec,nl12880bc20-05"
+#define RDU2_PANEL_13P3	IT_DUAL_LVDS,   BF_JEIDA, "auo,g133han01"
+#define RDU2_PANEL_15P6	IT_DUAL_LVDS,   BF_SPWG,  "nlt,nl192108ac18-02d"
+#define RDU2_PANEL_18P5	IT_DUAL_LVDS,   BF_SPWG,  "auo,g185han01"
+#define RDU2_PANEL_32P0	IT_DUAL_LVDS,   BF_SPWG,  "auo,p320hvn03"
+
+static const struct rdu2_lru_fixup rdu2_lru_fixups[] = {
+	RDU2_LRU_FIXUP("00-5122-01", RDU2_LRU_FLAG_NO_FEC, RDU2_PANEL_12P1),
+	RDU2_LRU_FIXUP("00-5122-02", RDU2_LRU_FLAG_NO_FEC, RDU2_PANEL_12P1),
+	RDU2_LRU_FIXUP("00-5120-01", 0, RDU2_PANEL_10P1),
+	RDU2_LRU_FIXUP("00-5120-02", 0, RDU2_PANEL_10P1),
+	RDU2_LRU_FIXUP("00-5120-51", 0, RDU2_PANEL_10P1),
+	RDU2_LRU_FIXUP("00-5120-52", 0, RDU2_PANEL_10P1),
+	RDU2_LRU_FIXUP("00-5123-01", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5123-02", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5123-03", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5123-51", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5123-52", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5123-53", 0, RDU2_PANEL_11P6),
+	RDU2_LRU_FIXUP("00-5124-01", 0, RDU2_PANEL_13P3),
+	RDU2_LRU_FIXUP("00-5124-02", 0, RDU2_PANEL_13P3),
+	RDU2_LRU_FIXUP("00-5124-03", 0, RDU2_PANEL_13P3),
+	RDU2_LRU_FIXUP("00-5124-53", 0, RDU2_PANEL_13P3),
+	RDU2_LRU_FIXUP("00-5127-01", 0, RDU2_PANEL_15P6),
+	RDU2_LRU_FIXUP("00-5127-02", 0, RDU2_PANEL_15P6),
+	RDU2_LRU_FIXUP("00-5127-03", 0, RDU2_PANEL_15P6),
+	RDU2_LRU_FIXUP("00-5127-53", 0, RDU2_PANEL_15P6),
+	RDU2_LRU_FIXUP("00-5125-01", 0, RDU2_PANEL_18P5),
+	RDU2_LRU_FIXUP("00-5125-02", 0, RDU2_PANEL_18P5),
+	RDU2_LRU_FIXUP("00-5125-03", 0, RDU2_PANEL_18P5),
+	RDU2_LRU_FIXUP("00-5125-53", 0, RDU2_PANEL_18P5),
+	RDU2_LRU_FIXUP("00-5132-01", RDU2_LRU_FLAG_EGALAX, RDU2_PANEL_32P0),
+	RDU2_LRU_FIXUP("00-5132-02", RDU2_LRU_FLAG_EGALAX, RDU2_PANEL_32P0),
+};
+
+/*
+ * This initcall needs to be executed before coredevices, so we have a chance
+ * to fix up the internal DT with the correct display information.
+ */
+static int rdu2_process_fixups(void)
+{
+	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+		return 0;
 
-	val = I210_CFGWORD_PCIID_157B;
-	pwrite(fd, &val, sizeof(val), 0);
+	zii_process_lru_fixups(rdu2_lru_fixups);
 
 	return 0;
 }
-late_initcall(rdu2_i210_invm);
+postmmu_initcall(rdu2_process_fixups);
diff --git a/arch/arm/boards/zii-vf610-dev/board.c b/arch/arm/boards/zii-vf610-dev/board.c
index a8fa1ef61f..1296f70317 100644
--- a/arch/arm/boards/zii-vf610-dev/board.c
+++ b/arch/arm/boards/zii-vf610-dev/board.c
@@ -123,6 +123,7 @@ static int zii_vf610_dev_set_hostname(void)
 		const char *hostname;
 	} boards[] = {
 		{ "zii,vf610spu3", "spu3" },
+		{ "zii,vf610spb4", "spb4" },
 		{ "zii,vf610cfu1", "cfu1" },
 		{ "zii,vf610dev-b", "dev-rev-b" },
 		{ "zii,vf610dev-c", "dev-rev-c" },
@@ -168,7 +169,8 @@ static int zii_vf610_register_emmc_bbu(void)
 	int ret;
 
 	if (!of_machine_is_compatible("zii,vf610spu3") &&
-	    !of_machine_is_compatible("zii,vf610cfu1"))
+	    !of_machine_is_compatible("zii,vf610cfu1") &&
+	    !of_machine_is_compatible("zii,vf610spb4"))
 		return 0;
 
 	ret = vf610_bbu_internal_mmcboot_register_handler("eMMC",
diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c
index d19318026c..79588ac381 100644
--- a/arch/arm/boards/zii-vf610-dev/lowlevel.c
+++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c
@@ -41,6 +41,7 @@ enum zii_platform_vf610_type {
 	ZII_PLATFORM_VF610_SSMB_SPU3	= 0x03,
 	ZII_PLATFORM_VF610_CFU1		= 0x04,
 	ZII_PLATFORM_VF610_DEV_REV_C	= 0x05,
+	ZII_PLATFORM_VF610_SPB4		= 0x06,
 };
 
 static unsigned int get_system_type(void)
@@ -77,7 +78,8 @@ extern char __dtb_vf610_zii_dev_rev_b_start[];
 extern char __dtb_vf610_zii_dev_rev_c_start[];
 extern char __dtb_vf610_zii_cfu1_start[];
 extern char __dtb_vf610_zii_ssmb_spu3_start[];
-extern char __dtb_vf610_zii_scu4_aib_rev_c_start[];
+extern char __dtb_vf610_zii_scu4_aib_start[];
+extern char __dtb_vf610_zii_spb4_start[];
 
 ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2)
 {
@@ -121,7 +123,7 @@ ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2)
 		fdt = __dtb_vf610_zii_dev_rev_b_start;
 		break;
 	case ZII_PLATFORM_VF610_SCU4_AIB:
-		fdt = __dtb_vf610_zii_scu4_aib_rev_c_start;
+		fdt = __dtb_vf610_zii_scu4_aib_start;
 		break;
 	case ZII_PLATFORM_VF610_DEV_REV_C:
 		fdt = __dtb_vf610_zii_dev_rev_c_start;
@@ -132,6 +134,9 @@ ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2)
 	case ZII_PLATFORM_VF610_SSMB_SPU3:
 		fdt = __dtb_vf610_zii_ssmb_spu3_start;
 		break;
+	case ZII_PLATFORM_VF610_SPB4:
+		fdt = __dtb_vf610_zii_spb4_start;
+		break;
 	}
 
 	vf610_barebox_entry(fdt + get_runtime_offset());
diff --git a/arch/arm/configs/kindle-mx50_defconfig b/arch/arm/configs/kindle-mx50_defconfig
index 31bfc9c06b..95b505fda2 100644
--- a/arch/arm/configs/kindle-mx50_defconfig
+++ b/arch/arm/configs/kindle-mx50_defconfig
@@ -4,8 +4,8 @@ CONFIG_MACH_KINDLE_MX50=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
+CONFIG_IMAGE_COMPRESSION_XZKERN=y
 CONFIG_MMU=y
-CONFIG_MMU_EARLY=y
 CONFIG_MALLOC_SIZE=0x0
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
@@ -13,7 +13,6 @@ CONFIG_RELOCATABLE=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_FLEXIBLE_BOOTARGS=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
@@ -24,47 +23,42 @@ CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_BOOT=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_LOADY=y
 CONFIG_CMD_RESET=y
-CONFIG_CMD_AUTOMOUNT=y
 CONFIG_CMD_EXPORT=y
-CONFIG_CMD_GLOBAL=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DETECT=y
 CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
 CONFIG_CMD_USBGADGET=y
-CONFIG_CMD_OF_DUMP=y
 CONFIG_CMD_OFTREE=y
 CONFIG_OFDEVICE=y
-CONFIG_OF_GPIO=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_MTD=y
-CONFIG_MTD_WRITE=y
 CONFIG_MTD_M25P80=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_USB=y
 CONFIG_USB_HOST=y
 CONFIG_USB_IMX_CHIPIDEA=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DRIVER_ARC=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_USB_GADGET_FASTBOOT=y
 CONFIG_MCI=y
-CONFIG_MCI_INFO=y
-CONFIG_MCI_WRITE=y
+CONFIG_MCI_STARTUP=y
 CONFIG_MCI_MMC_BOOT_PARTITIONS=y
 CONFIG_MCI_IMX_ESDHC=y
-CONFIG_PINCTRL=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED=y
 CONFIG_GENERIC_PHY=y
 CONFIG_USB_NOP_XCEIV=y
-CONFIG_FS_AUTOMOUNT=y
-CONFIG_IMAGE_COMPRESSION_XZKERN=y
+CONFIG_FS_EXT4=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_WRITE=y
+CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/kindle3_defconfig b/arch/arm/configs/kindle3_defconfig
index a4e08dfad0..98691c3a81 100644
--- a/arch/arm/configs/kindle3_defconfig
+++ b/arch/arm/configs/kindle3_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARCH_IMX=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x30000
 CONFIG_MACH_KINDLE3=y
 CONFIG_IMX_IIM=y
-CONFIG_ARCH_IMX_USBLOADER=y
 CONFIG_AEABI=y
 CONFIG_ARM_BOARD_APPEND_ATAG=y
 CONFIG_ARM_BOARD_PREPEND_ATAG=y
@@ -10,6 +9,7 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_PBL_RELOCATABLE=y
 CONFIG_IMAGE_COMPRESSION_XZKERN=y
+CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_RELOCATABLE=y
@@ -64,3 +64,4 @@ CONFIG_FS_EXT4=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
+CONFIG_ARCH_IMX_USBLOADER=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f989df6b0c..f694871efc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -123,7 +123,8 @@ pbl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \
 	vf610-zii-dev-rev-c.dtb.o 	\
 	vf610-zii-cfu1.dtb.o		\
 	vf610-zii-ssmb-spu3.dtb.o	\
-	vf610-zii-scu4-aib-rev-c.dtb.o
+	vf610-zii-scu4-aib.dtb.o	\
+	vf610-zii-spb4.dtb.o
 pbl-dtb-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o
 pbl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o
 pbl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o
diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
index fea219f1e1..bfc75ba606 100644
--- a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
+++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
@@ -49,6 +49,11 @@
 		};
 	};
 
+	device-info {
+		nvmem-cells = <&lru_part_number>;
+		nvmem-cell-names = "lru-part-number";
+	};
+
 	aliases {
 		ethernet0 = &fec;
 		ethernet1 = &i210;
@@ -59,8 +64,96 @@
 		 */
 		switch-eeprom = &switch;
 	};
-};
 
+	panel {
+		compatible = "simple-panel";
+		/* Timings for all supported panels, the correct one is enabled
+		 * after the board data has been retrieved from the environment
+		 * controller
+		*/
+
+		display-timings {
+			innolux-g121i1-l01 {
+				compatible = "innolux,g121i1-l01";
+
+				hback-porch = <79>;
+				hfront-porch = <80>;
+				hactive = <1280>;
+				hsync-len = <1>;
+				vback-porch = <11>;
+				vfront-porch = <11>;
+				vactive = <800>;
+				vsync-len = <1>;
+				clock-frequency = <71000000>;
+			};
+			nec-nl12880bc20-05 {
+				compatible = "nec,nl12880bc20-05";
+
+				hback-porch = <100>;
+				hfront-porch = <30>;
+				hactive = <1280>;
+				hsync-len = <30>;
+				vback-porch = <11>;
+				vfront-porch = <5>;
+				vactive = <800>;
+				vsync-len = <7>;
+				clock-frequency = <71000000>;
+			};
+			auo-g133han01 {
+				compatible = "auo,g133han01";
+
+				hback-porch = <88>;
+				hfront-porch = <58>;
+				hactive = <1920>;
+				hsync-len = <42>;
+				vback-porch = <14>;
+				vfront-porch = <8>;
+				vactive = <1080>;
+				vsync-len = <14>;
+				clock-frequency = <141200000>;
+			};
+			auo-g185han01 {
+				compatible = "auo,g185han01";
+
+				hback-porch = <44>;
+				hfront-porch = <60>;
+				hactive = <1920>;
+				hsync-len = <24>;
+				vback-porch = <5>;
+				vfront-porch = <10>;
+				vactive = <1080>;
+				vsync-len = <5>;
+				clock-frequency = <144000000>;
+			};
+			nlt-nl192108ac18-02d {
+				compatible = "nlt,nl192108ac18-02d";
+
+				hback-porch = <120>;
+				hfront-porch = <100>;
+				hactive = <1920>;
+				hsync-len = <60>;
+				vback-porch = <10>;
+				vfront-porch = <30>;
+				vactive = <1080>;
+				vsync-len = <5>;
+				clock-frequency = <148350000>;
+			};
+			auo-p320hvn03 {
+				compatible = "auo,p320hvn03";
+
+				hback-porch = <50>;
+				hfront-porch = <50>;
+				hactive = <1920>;
+				hsync-len = <40>;
+				vback-porch = <17>;
+				vfront-porch = <17>;
+				vactive = <1080>;
+				vsync-len = <11>;
+				clock-frequency = <148500000>;
+			};
+		};
+	};
+};
 
 &uart4 {
 	rave-sp {
@@ -73,6 +166,11 @@
 		};
 
 		eeprom@a4 {
+			lru_part_number: lru-part-number@21 {
+				reg = <0x21 15>;
+				read-only;
+			};
+
 			boot_source: boot-source@83 {
 				reg = <0x83 1>;
 			};
@@ -110,12 +208,38 @@
 	nvmem-cell-names = "mac-address";
 };
 
+&i2c1 {
+	edp-bridge@68 {
+		pinctrl-0 = <&pinctrl_tc358767>, <&pinctrl_disp0>;
+
+		ports {
+			port@1 {
+				reg = <1>;
+
+				tc358767_in: endpoint {
+					remote-endpoint = <&disp0_out>;
+				};
+			};
+		};
+	};
+};
+
 &i2c2 {
 	temp-sense@48 {
 		barebox,sensor-name = "Temp Sensor 1";
 	};
 };
 
+&ipu1_di0_disp0 {
+	remote-endpoint = <&tc358767_in>;
+};
+
+&ldb {
+	lvds-channel@0 {
+		fsl,data-width = <24>;
+	};
+};
+
 &i210 {
 	nvmem-cells = <&mac_address_1>;
 	nvmem-cell-names = "mac-address";
diff --git a/arch/arm/dts/imx8mq-phytec-phycore-som.dts b/arch/arm/dts/imx8mq-phytec-phycore-som.dts
index de8ed1873f..736c007f49 100644
--- a/arch/arm/dts/imx8mq-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx8mq-phytec-phycore-som.dts
@@ -205,6 +205,13 @@
 	};
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
 &iomuxc {
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
@@ -325,4 +332,10 @@
 			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
 		>;
 	};
+
+	pinctrl_wdog: wdoggrp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
+		>;
+	};
 };
diff --git a/arch/arm/dts/vf610-zii-scu4-aib-rev-c.dts b/arch/arm/dts/vf610-zii-scu4-aib-rev-c.dts
deleted file mode 100644
index 12c2568bcc..0000000000
--- a/arch/arm/dts/vf610-zii-scu4-aib-rev-c.dts
+++ /dev/null
@@ -1,459 +0,0 @@
-/*
- * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
- *
- * Based on an original 'vf610-twr.dts' which is Copyright 2015,
- * Freescale Semiconductor, Inc.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License
- *     version 2 as published by the Free Software Foundation.
- *
- *     This file is distributed in the hope that it will be useful
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-
-#include <arm/vf610-zii-dev.dtsi>
-
-#include "vf610-zii-dev.dtsi"
-
-/ {
-	model = "ZII VF610 SCU4 AIB, Rev C";
-	compatible = "zii,vf610scu4-aib-c", "zii,vf610dev", "fsl,vf610";
-
-	chosen {
-		bootargs = "console=ttyLP0,115200n8";
-	};
-
-	gpio-leds {
-		debug {
-			gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	mdio-mux {
-		compatible = "mdio-mux-gpio";
-		pinctrl-0 = <&pinctrl_mdio_mux>;
-		pinctrl-names = "default";
-		gpios = <&gpio4 4  GPIO_ACTIVE_HIGH
-			 &gpio4 5  GPIO_ACTIVE_HIGH
-			 &gpio3 30 GPIO_ACTIVE_HIGH
-			 &gpio3 31 GPIO_ACTIVE_HIGH>;
-		mdio-parent-bus = <&mdio1>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		mdio_mux_1: mdio@1 {
-			reg = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		mdio_mux_2: mdio@2 {
-			reg = <2>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		mdio_mux_4: mdio@4 {
-			reg = <4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		mdio_mux_8: mdio@8 {
-			reg = <8>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-	};
-
-	spi2 {
-		compatible = "spi-gpio";
-		pinctrl-0 = <&pinctrl_dspi2>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		gpio-sck  = <&gpio2 3 GPIO_ACTIVE_HIGH>;
-		gpio-mosi = <&gpio2 2 GPIO_ACTIVE_HIGH>;
-		gpio-miso = <&gpio2 1 GPIO_ACTIVE_HIGH>;
-		cs-gpios  = <&gpio2 0 GPIO_ACTIVE_HIGH>;
-		num-chipselects = <1>;
-
-		at93c46d@0 {
-			compatible = "atmel,at93c46d";
-			#address-cells = <0>;
-			#size-cells = <0>;
-			reg = <0>;
-			spi-max-frequency = <500000>;
-			spi-cs-high;
-			data-size = <16>;
-			select-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&dspi0 {
-	pinctrl-0 = <&pinctrl_dspi0>, <&pinctrl_dspi0_cs_4_5>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&dspi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_dspi1>;
-	status = "okay";
-
-	m25p128@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "m25p128", "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <50000000>;
-
-		partition@0 {
-			label = "m25p128-0";
-			reg = <0x0 0x01000000>;
-		};
-	};
-
-	m25p128@1 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "m25p128", "jedec,spi-nor";
-		reg = <1>;
-		spi-max-frequency = <50000000>;
-
-		partition@0 {
-			label = "m25p128-1";
-			reg = <0x0 0x01000000>;
-		};
-	};
-};
-
-&esdhc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_esdhc0>;
-	bus-width = <8>;
-	status = "okay";
-};
-
-&fec0 {
-	status = "disabled";
-};
-
-&i2c0 {
-	/* Reset Signals */
-	gpio5: pca9505@20 {
-		compatible = "nxp,pca9554";
-		reg = <0x20>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	/* Board Revision */
-	gpio6: pca9505@22 {
-		compatible = "nxp,pca9554";
-		reg = <0x22>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-};
-
-&i2c1 {
-	/* Wireless 2 */
-	gpio8: pca9554@18 {
-		compatible = "nxp,pca9557";
-		reg = <0x18>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	/* Wireless 1 */
-	gpio7: pca9554@24 {
-		compatible = "nxp,pca9554";
-		reg = <0x24>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	/* AIB voltage monitor */
-	adt7411@4a {
-		compatible = "adi,adt7411";
-		reg = <0x4a>;
-	};
-};
-
-&i2c2 {
-	/* FIB voltage monitor */
-	adt7411@4a {
-		compatible = "adi,adt7411";
-		reg = <0x4a>;
-	};
-
-        lm75_swb {
-                compatible = "national,lm75";
-                reg = <0x4e>;
-        };
-
-	lm75_swa {
-                compatible = "national,lm75";
-                reg = <0x4f>;
-        };
-
-	/* FIB Nameplate */
-	at24c08@57 {
-		compatible = "atmel,24c08";
-		reg = <0x57>;
-	};
-
-	tca9548@70 {
-		compatible = "nxp,pca9548";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x70>;
-
-		i2c@1 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <1>;
-
-			sff0: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@2 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <2>;
-
-			sff1: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <3>;
-
-			sff2: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@4 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <4>;
-
-			sff3: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@5 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <5>;
-
-			sff4: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-	};
-
-
-	tca9548@71 {
-		compatible = "nxp,pca9548";
-		reg = <0x71>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c@1 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <1>;
-
-			sff5: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@2 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <2>;
-
-			sff6: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <3>;
-
-			sff7: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-
-		};
-
-		i2c@4 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <4>;
-
-			sff8: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-
-		i2c@5 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <5>;
-
-			sff9: at24c04@50 {
-				compatible = "atmel,24c04";
-				reg = <0x50>;
-			};
-		};
-	};
-};
-
-&uart1 {
-	linux,rs485-enabled-at-boot-time;
-	pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_rts>;
-};
-
-&uart2 {
-	linux,rs485-enabled-at-boot-time;
-	pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart2_rts>;
-};
-
-&iomuxc {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpo_public>;
-
-
-	pinctrl_gpo_public: gpopubgrp {
-		fsl,pins = <
-			VF610_PAD_PTE2__GPIO_107		0x2062
-			VF610_PAD_PTE3__GPIO_108		0x2062
-			VF610_PAD_PTE4__GPIO_109		0x2062
-			VF610_PAD_PTE5__GPIO_110		0x2062
-			VF610_PAD_PTE6__GPIO_111		0x2062
-		>;
-	};
-
-	pinctrl_dspi0_cs_4_5: dspi0grp-cs-4-5 {
-		fsl,pins = <
-			VF610_PAD_PTB13__DSPI0_CS4		0x1182
-			VF610_PAD_PTB12__DSPI0_CS5		0x1182
-		>;
-	};
-
-	pinctrl_dspi1: dspi1grp {
-		fsl,pins = <
-			VF610_PAD_PTD5__DSPI1_CS0		0x1182
-			VF610_PAD_PTD4__DSPI1_CS1		0x1182
-			VF610_PAD_PTC6__DSPI1_SIN		0x1181
-			VF610_PAD_PTC7__DSPI1_SOUT		0x1182
-			VF610_PAD_PTC8__DSPI1_SCK		0x1182
-		>;
-	};
-
-	pinctrl_esdhc0: esdhc0grp {
-		fsl,pins = <
-			VF610_PAD_PTC0__ESDHC0_CLK	 0x31ef
-			VF610_PAD_PTC1__ESDHC0_CMD	 0x31ef
-			VF610_PAD_PTC2__ESDHC0_DAT0	 0x31ef
-			VF610_PAD_PTC3__ESDHC0_DAT1	 0x31ef
-			VF610_PAD_PTC4__ESDHC0_DAT2	 0x31ef
-			VF610_PAD_PTC5__ESDHC0_DAT3	 0x31ef
-			VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef
-			VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef
-			VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef
-			VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef
-		>;
-	};
-
-	pinctrl_i2c3: i2c3grp {
-		fsl,pins = <
-			VF610_PAD_PTA30__I2C3_SCL		0x37ff
-			VF610_PAD_PTA31__I2C3_SDA		0x37ff
-		>;
-	};
-
-	pinctrl_leds_debug: pinctrl-leds-debug {
-		fsl,pins = <
-			VF610_PAD_PTB26__GPIO_96		0x31c2
-		>;
-	};
-
-	pinctrl_uart1_rts: uart1grp-rts {
-		fsl,pins = <
-			VF610_PAD_PTB25__UART1_RTS		0x2062
-		>;
-	};
-
-	pinctrl_uart2_rts: uart2grp-rts {
-		fsl,pins = <
-			VF610_PAD_PTD2__UART2_RTS		0x2062
-		>;
-	};
-
-	pinctrl_mdio_mux: pinctrl-mdio-mux {
-		fsl,pins = <
-			VF610_PAD_PTE27__GPIO_132	0x31c2
-			VF610_PAD_PTE28__GPIO_133	0x31c2
-			VF610_PAD_PTE21__GPIO_126	0x31c2
-			VF610_PAD_PTE22__GPIO_127	0x31c2
-		>;
-	};
-};
diff --git a/arch/arm/dts/vf610-zii-scu4-aib.dts b/arch/arm/dts/vf610-zii-scu4-aib.dts
new file mode 100644
index 0000000000..abe9e14fd7
--- /dev/null
+++ b/arch/arm/dts/vf610-zii-scu4-aib.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//
+// Copyright (C) 2016-2018 Zodiac Inflight Innovations
+
+#include <arm/vf610-zii-scu4-aib.dts>
+
+#include "vf610-zii-dev.dtsi"
+
+/ {
+	aliases {
+		/*
+		 * NVMEM device corresponding to EEPROM attached to
+                 * the switch shares DT node with it, so we use that
+                 * fact to create a desirable naming
+		 */
+		switch0-eeprom = &switch0;
+		switch1-eeprom = &switch1;
+		switch2-eeprom = &switch2;
+		switch3-eeprom = &switch3;
+	};
+};
diff --git a/arch/arm/dts/vf610-zii-spb4.dts b/arch/arm/dts/vf610-zii-spb4.dts
new file mode 100644
index 0000000000..e7d35d0e69
--- /dev/null
+++ b/arch/arm/dts/vf610-zii-spb4.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "vf610-zii-spb4.dtsi"
+
+#include "vf610-zii-dev.dtsi"
+
+/ {
+	aliases {
+		/*
+		* NVMEM device corresponding to EEPROM attached to
+		* the switch shared DT node with it, so we use that
+		* fact to create a desirable naming
+		*/
+		switch-eeprom = &switch0;
+	};
+};
diff --git a/arch/arm/dts/vf610-zii-spb4.dtsi b/arch/arm/dts/vf610-zii-spb4.dtsi
new file mode 100644
index 0000000000..f618ca45ee
--- /dev/null
+++ b/arch/arm/dts/vf610-zii-spb4.dtsi
@@ -0,0 +1,365 @@
+/*
+ * This is a copy of DTS file from Linux. Remove it once the same file
+ * is availible via dts/src/arm
+ */
+
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/*
+ * Device tree file for ZII's SPB4 board
+ *
+ * SPB - Seat Power Box
+ *
+ * Copyright (C) 2019 Zodiac Inflight Innovations
+ */
+
+/dts-v1/;
+#include <arm/vf610.dtsi>
+
+/ {
+	model = "ZII VF610 SPB4 Board";
+	compatible = "zii,vf610spb4", "zii,vf610dev", "fsl,vf610";
+
+	chosen {
+		stdout-path = &uart0;
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x20000000>;
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&pinctrl_leds_debug>;
+		pinctrl-names = "default";
+
+		led-debug {
+			label = "zii:green:debug1";
+			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			max-brightness = <1>;
+		};
+	};
+
+	reg_vcc_3v3_mcu: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_3v3_mcu";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+};
+
+&adc0 {
+	vref-supply = <&reg_vcc_3v3_mcu>;
+	status = "okay";
+};
+
+&adc1 {
+	vref-supply = <&reg_vcc_3v3_mcu>;
+	status = "okay";
+};
+
+&dspi1 {
+	bus-num = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_dspi1>;
+	status = "okay";
+
+	m25p128@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "m25p128", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&edma0 {
+	status = "okay";
+};
+
+&edma1 {
+	status = "okay";
+};
+
+&esdhc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_esdhc0>;
+	bus-width = <8>;
+	non-removable;
+	no-1-8-v;
+	keep-power-in-suspend;
+	no-sdio;
+	no-sd;
+	status = "okay";
+};
+
+&esdhc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_esdhc1>;
+	bus-width = <4>;
+	no-sdio;
+	status = "okay";
+};
+
+&fec1 {
+	phy-mode = "rmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
+	status = "okay";
+
+	fixed-link {
+		speed = <100>;
+		full-duplex;
+	};
+
+	mdio1: mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+
+		switch0: switch0@0 {
+			compatible = "marvell,mv88e6190";
+			pinctrl-0 = <&pinctrl_gpio_switch0>;
+			pinctrl-names = "default";
+			reg = <0>;
+			eeprom-length = <65536>;
+			reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
+			interrupt-parent = <&gpio3>;
+			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					label = "cpu";
+					ethernet = <&fec1>;
+
+					fixed-link {
+						speed = <100>;
+						full-duplex;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					label = "eth_cu_1000_1";
+				};
+
+				port@2 {
+					reg = <2>;
+					label = "eth_cu_1000_2";
+				};
+
+				port@3 {
+					reg = <3>;
+					label = "eth_cu_1000_3";
+				};
+
+				port@4 {
+					reg = <4>;
+					label = "eth_cu_1000_4";
+				};
+
+				port@5 {
+					reg = <5>;
+					label = "eth_cu_1000_5";
+				};
+
+				port@6 {
+					reg = <6>;
+					label = "eth_cu_1000_6";
+				};
+			};
+		};
+	};
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c0>;
+	status = "okay";
+
+	gpio6: pca9505@22 {
+		compatible = "nxp,pca9554";
+		reg = <0x22>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	at24c04@50 {
+		compatible = "atmel,24c04";
+		reg = <0x50>;
+		label = "nameplate";
+	};
+
+	at24c04@52 {
+		compatible = "atmel,24c04";
+		reg = <0x52>;
+	};
+};
+
+&snvsrtc {
+	status = "disabled";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+
+	rave-sp {
+		compatible = "zii,rave-sp-rdu2";
+		current-speed = <1000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		watchdog {
+			compatible = "zii,rave-sp-watchdog";
+		};
+
+		eeprom@a3 {
+			compatible = "zii,rave-sp-eeprom";
+			reg = <0xa3 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			zii,eeprom-name = "main-eeprom";
+		};
+	};
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "okay";
+};
+
+&wdoga5 {
+       status = "disabled";
+};
+
+&iomuxc {
+	pinctrl_dspi1: dspi1grp {
+		fsl,pins = <
+			VF610_PAD_PTD5__DSPI1_CS0		0x1182
+			VF610_PAD_PTD4__DSPI1_CS1		0x1182
+			VF610_PAD_PTC6__DSPI1_SIN		0x1181
+			VF610_PAD_PTC7__DSPI1_SOUT		0x1182
+			VF610_PAD_PTC8__DSPI1_SCK		0x1182
+		>;
+	};
+
+	pinctrl_esdhc0: esdhc0grp {
+		fsl,pins = <
+			VF610_PAD_PTC0__ESDHC0_CLK		0x31ef
+			VF610_PAD_PTC1__ESDHC0_CMD		0x31ef
+			VF610_PAD_PTC2__ESDHC0_DAT0		0x31ef
+			VF610_PAD_PTC3__ESDHC0_DAT1		0x31ef
+			VF610_PAD_PTC4__ESDHC0_DAT2		0x31ef
+			VF610_PAD_PTC5__ESDHC0_DAT3		0x31ef
+			VF610_PAD_PTD23__ESDHC0_DAT4		0x31ef
+			VF610_PAD_PTD22__ESDHC0_DAT5		0x31ef
+			VF610_PAD_PTD21__ESDHC0_DAT6		0x31ef
+			VF610_PAD_PTD20__ESDHC0_DAT7		0x31ef
+		>;
+	};
+
+	pinctrl_esdhc1: esdhc1grp {
+		fsl,pins = <
+			VF610_PAD_PTA24__ESDHC1_CLK		0x31ef
+			VF610_PAD_PTA25__ESDHC1_CMD		0x31ef
+			VF610_PAD_PTA26__ESDHC1_DAT0		0x31ef
+			VF610_PAD_PTA27__ESDHC1_DAT1		0x31ef
+			VF610_PAD_PTA28__ESDHC1_DATA2		0x31ef
+			VF610_PAD_PTA29__ESDHC1_DAT3		0x31ef
+		>;
+	};
+
+	pinctrl_fec1: fec1grp {
+		fsl,pins = <
+			VF610_PAD_PTA6__RMII_CLKIN		0x30d1
+			VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
+			VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
+			VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
+			VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1
+			VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
+			VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
+			VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
+			VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
+			VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
+		>;
+	};
+
+	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
+		fsl,pins = <
+			VF610_PAD_PTE2__GPIO_107		0x31c2
+			VF610_PAD_PTB28__GPIO_98		0x219d
+		>;
+	};
+
+	pinctrl_i2c0: i2c0grp {
+		fsl,pins = <
+			VF610_PAD_PTB14__I2C0_SCL		0x37ff
+			VF610_PAD_PTB15__I2C0_SDA		0x37ff
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			VF610_PAD_PTB16__I2C1_SCL		0x37ff
+			VF610_PAD_PTB17__I2C1_SDA		0x37ff
+		>;
+	};
+
+	pinctrl_leds_debug: pinctrl-leds-debug {
+		fsl,pins = <
+			VF610_PAD_PTD3__GPIO_82			0x31c2
+		>;
+	};
+
+	pinctrl_uart0: uart0grp {
+		fsl,pins = <
+			VF610_PAD_PTB10__UART0_TX		0x21a2
+			VF610_PAD_PTB11__UART0_RX		0x21a1
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			VF610_PAD_PTB23__UART1_TX		0x21a2
+			VF610_PAD_PTB24__UART1_RX		0x21a1
+		>;
+	};
+
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			VF610_PAD_PTD0__UART2_TX		0x21a2
+			VF610_PAD_PTD1__UART2_RX		0x21a1
+		>;
+	};
+
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			VF610_PAD_PTA30__UART3_TX		0x21a2
+			VF610_PAD_PTA31__UART3_RX		0x21a1
+		>;
+	};
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index f3f3a49339..c4e7500e8f 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -431,16 +431,21 @@ config MACH_VF610_TWR
 	bool "Freescale VF610 Tower Board"
 	select ARCH_VF610
 
+config MACH_ZII_COMMON
+	bool
+
 config MACH_ZII_RDU1
 	bool "ZII i.MX51 RDU1"
 	select ARCH_IMX51
 	select MACH_FREESCALE_MX51_PDK_POWER
 	select CRC8
+	select MACH_ZII_COMMON
 
 config MACH_ZII_RDU2
 	bool "ZII i.MX6Q(+) RDU2"
 	select ARCH_IMX6
 	select MCI_IMX_ESDHC_PBL
+	select MACH_ZII_COMMON
 
 config MACH_ZII_IMX8MQ_DEV
 	bool "ZII i.MX8MQ based devices"