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author | Michael Tretter <m.tretter@pengutronix.de> | 2018-12-07 11:11:54 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-12-10 10:13:30 +0100 |
commit | 64d95896cf0e22a769066f33180b60707356160b (patch) | |
tree | 4e214927fdf60767e6037ee32cc15eff4ca273a4 /arch | |
parent | 6878bd78c9f6157357ae8170bc8b8a7d0dbe3cb1 (diff) | |
download | barebox-64d95896cf0e22a769066f33180b60707356160b.tar.gz barebox-64d95896cf0e22a769066f33180b60707356160b.tar.xz |
ARM: aarch64: compile with general-regs-only
Without this flag, gcc generates code to save the Q/V registers to the
stack for handling the va_list in pr_print(). Saving the registers is
useless, as the registers are never restored, but accessing the
registers to save them hangs the CPU.
Follow the Linux arch/arm64/Makefile and use the general-regs-only flag
to prevent usage of floating point and Advanced SIMD register.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Makefile | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5db67b9db8..50958b787f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -27,6 +27,10 @@ else CFLAGS += -mstrict-align endif +# Prevent use of floating point and Advanced SIMD registers. +ifeq ($(CONFIG_CPU_V8),y) +CFLAGS += -mgeneral-regs-only +endif # This selects which instruction set is used. # Note that GCC does not numerically define an architecture version |