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authorLucas Stach <dev@lynxeye.de>2014-04-13 15:27:36 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-04-23 11:39:14 +0200
commit90542372c4750c6f93690f58d3a415d1d1c416b9 (patch)
treebd9edc30648d4ab5d0e39855de37c07ac9f69be6 /arch
parentcdc5b61c6dacc5975449d96738e1f8de5b88e5f2 (diff)
downloadbarebox-90542372c4750c6f93690f58d3a415d1d1c416b9.tar.gz
barebox-90542372c4750c6f93690f58d3a415d1d1c416b9.tar.xz
tegra: add Tegra3 ramsize detection
Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/include/mach/lowlevel.h21
-rw-r--r--arch/arm/mach-tegra/tegra_maincomplex_init.c6
2 files changed, 26 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index cc346a023d..d7b6f1e994 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -39,6 +39,7 @@
#define T20_ODMDATA_RAMSIZE_SHIFT 28
#define T20_ODMDATA_RAMSIZE_MASK (3 << T20_ODMDATA_RAMSIZE_SHIFT)
+#define T30_ODMDATA_RAMSIZE_MASK (0xf << T20_ODMDATA_RAMSIZE_SHIFT)
#define T20_ODMDATA_UARTTYPE_SHIFT 18
#define T20_ODMDATA_UARTTYPE_MASK (3 << T20_ODMDATA_UARTTYPE_SHIFT)
#define T20_ODMDATA_UARTID_SHIFT 15
@@ -124,6 +125,26 @@ uint32_t tegra20_get_ramsize(void)
}
}
+static __always_inline
+uint32_t tegra30_get_ramsize(void)
+{
+ switch ((tegra_get_odmdata() & T30_ODMDATA_RAMSIZE_MASK) >>
+ T20_ODMDATA_RAMSIZE_SHIFT) {
+ case 0:
+ case 1:
+ default:
+ return SZ_256M;
+ case 2:
+ return SZ_512M;
+ case 3:
+ return SZ_512M + SZ_256M;
+ case 4:
+ return SZ_1G;
+ case 8:
+ return SZ_2G - SZ_1M;
+ }
+}
+
static long uart_id_to_base[] = {
TEGRA_UARTA_BASE,
TEGRA_UARTB_BASE,
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index 5aad1dd65e..776af64aea 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ * Copyright (C) 2013-2014 Lucas Stach <l.stach@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -41,6 +41,10 @@ void tegra_maincomplex_entry(void)
rambase = 0x0;
ramsize = tegra20_get_ramsize();
break;
+ case TEGRA30:
+ rambase = SZ_2G;
+ ramsize = tegra30_get_ramsize();
+ break;
default:
/* If we don't know the chiptype, better bail out */
unreachable();