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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-06-09 07:59:02 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-06-17 08:26:21 +0200 |
| commit | a38be63831aa3c5696581a58c8afb5bfc11e45d5 (patch) | |
| tree | 8a3750da834b254d9c54a860948e8a73ed6ecdad /arch | |
| parent | e31495eeb3a9e179a736e67012b17cc4a7bfc10b (diff) | |
| download | barebox-a38be63831aa3c5696581a58c8afb5bfc11e45d5.tar.gz barebox-a38be63831aa3c5696581a58c8afb5bfc11e45d5.tar.xz | |
ARM64: asm: implement read_cpuid_id()
We'll need to use this function in code that will be compiled for both
32-bit and 64-bit ARM, so add the 64-bit implementation.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220609055922.667016-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/cputype.h | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index 7dc027c174..c3fc057650 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -6,6 +6,23 @@ #include <linux/stringify.h> #include <linux/kernel.h> +#ifdef CONFIG_CPU_64v8 + +#define CPUID_ID midr_el1 +#define CPUID_CACHETYPE ctr_el0 +#define CPUID_MPIDR mpidr_el1 + +#define read_cpuid(reg) \ + ({ \ + unsigned int __val; \ + asm("mrs %0, " __stringify(reg) \ + : "=r" (__val) \ + : \ + : "cc"); \ + __val; \ + }) +#else + #define CPUID_ID 0 #define CPUID_CACHETYPE 1 #define CPUID_TCM 2 @@ -27,8 +44,6 @@ #define CPUID_EXT_ISAR4 "c2, 4" #define CPUID_EXT_ISAR5 "c2, 5" -extern unsigned int processor_id; - #define read_cpuid(reg) \ ({ \ unsigned int __val; \ @@ -47,6 +62,9 @@ extern unsigned int processor_id; : "cc"); \ __val; \ }) +#endif + +extern unsigned int processor_id; /* * The CPU ID never changes at run time, so we might as well tell the |