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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-08-30 09:50:45 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-09-01 10:44:09 +0200 |
| commit | a73d94b5505107bc125e393e8472bdb5e32d5c04 (patch) | |
| tree | 9f8a7030453729e64a5d24a8e38de158879984db /arch | |
| parent | c86f4e086fb4cde2f0bdbf152b64c679d46b45f5 (diff) | |
| download | barebox-a73d94b5505107bc125e393e8472bdb5e32d5c04.tar.gz barebox-a73d94b5505107bc125e393e8472bdb5e32d5c04.tar.xz | |
ARM: dts: i.MX8MM: describe feature controller
Now with i.MX8M feature controller driver support available, have the
OCOTP provide feature control on the i.MX8MM to ensure the kernel DT
does not cause Linux to access the VPU and its power domains,
when barebox knows them to be unavailable.
This is needed because the upstream kernel imx8mm.dtsi only
describes the full-featured SoC, which can lead to hangs when
instantiating drivers for hardware that's unavailable in a
less-featureful variant of the SoC.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220830075045.1052357-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/imx8mm.dtsi | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index cdf2128205..1e81d03d6b 100644 --- a/arch/arm/dts/imx8mm.dtsi +++ b/arch/arm/dts/imx8mm.dtsi @@ -1,10 +1,18 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include <dt-bindings/features/imx8m.h> + / { aliases { gpr.reboot_mode = &reboot_mode_gpr; }; }; +feat: &ocotp { + #feature-cells = <1>; + barebox,feature-controller; +}; + &pgc_otg1 { barebox,allow-dummy; }; @@ -24,3 +32,47 @@ mode-serial = <0x00000010>, <0x40000000>; }; }; + +&A53_1 { + barebox,feature-gates = <&feat IMX8M_FEAT_CPU_DUAL>; +}; + +&A53_2 { + barebox,feature-gates = <&feat IMX8M_FEAT_CPU_QUAD>; +}; + +&A53_3 { + barebox,feature-gates = <&feat IMX8M_FEAT_CPU_QUAD>; +}; + +&gpc { + barebox,feature-gates = <&feat 0>; +}; + +&vpu_g1 { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&vpu_g2 { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&vpu_blk_ctrl { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&pgc_vpumix { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&pgc_vpu_g1 { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&pgc_vpu_g2 { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; + +&pgc_vpu_h1 { + barebox,feature-gates = <&feat IMX8M_FEAT_VPU>; +}; |