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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-01 09:23:21 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-01 09:23:45 +0200 |
| commit | aa68c6bd3615ff64288652b6fba76cd50b61d26d (patch) | |
| tree | 480ba1daa3111eb548082b59bfba8d28881efd82 /arch | |
| parent | d991bcaa50a81cab18755d606c13bafc36390948 (diff) | |
| download | barebox-aa68c6bd3615ff64288652b6fba76cd50b61d26d.tar.gz barebox-aa68c6bd3615ff64288652b6fba76cd50b61d26d.tar.xz | |
arm: rk3288-phycore-som: Fix memory node
Upstream arm/rk3288.dtsi specifies #address-cells = <2> and #size-cells
= <2> for the root node, so we have to use 64bit addresses and sizes in
the memory node as well.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rk3288-phycore-som.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/rk3288-phycore-som.dts b/arch/arm/dts/rk3288-phycore-som.dts index dd74bcfb11..65c53895c4 100644 --- a/arch/arm/dts/rk3288-phycore-som.dts +++ b/arch/arm/dts/rk3288-phycore-som.dts @@ -21,7 +21,7 @@ compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; memory { - reg = <0 0x40000000>; + reg = <0x0 0x0 0x0 0x40000000>; }; vcc33: fixedregulator@0 { |