diff options
| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2018-07-31 12:44:35 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-08-08 09:21:48 +0200 |
| commit | bc8adf6cfe67ca03f481d581f9f7cc88bc48a914 (patch) | |
| tree | 49efd34bd46bdfab8cf3c8a7800e0655ae23f022 /arch | |
| parent | 6e147fbd821a4ae586b4ca43edc1661da56b3e3b (diff) | |
| download | barebox-bc8adf6cfe67ca03f481d581f9f7cc88bc48a914.tar.gz barebox-bc8adf6cfe67ca03f481d581f9f7cc88bc48a914.tar.xz | |
ARM: socfpga: achilles: update handoff files
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boards/reflex-achilles/pinmux-config-arria10.c | 2 | ||||
| -rw-r--r-- | arch/arm/boards/reflex-achilles/pll-config-arria10.c | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c index 246838a228..b6a72304b6 100644 --- a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c @@ -69,7 +69,7 @@ static uint32_t pinmux[] = { [arria10_pincfg_dedicated_io_3] = 0xb080a, [arria10_pincfg_dedicated_io_4] = 0xa282a, [arria10_pincfg_dedicated_io_5] = 0xa282a, -[arria10_pincfg_dedicated_io_6] = 0xa282a, +[arria10_pincfg_dedicated_io_6] = 0x8282a, [arria10_pincfg_dedicated_io_7] = 0xa282a, [arria10_pincfg_dedicated_io_8] = 0xa282a, [arria10_pincfg_dedicated_io_9] = 0xa282a, diff --git a/arch/arm/boards/reflex-achilles/pll-config-arria10.c b/arch/arm/boards/reflex-achilles/pll-config-arria10.c index 94d596606e..9da41ecdf2 100644 --- a/arch/arm/boards/reflex-achilles/pll-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pll-config-arria10.c @@ -6,8 +6,8 @@ static struct arria10_mainpll_cfg mainpll_cfg = { .cntr3clk_cnt = 900, .cntr4clk_cnt = 900, .cntr5clk_cnt = 900, - .cntr6clk_cnt = 7, - .cntr7clk_cnt = 900, + .cntr6clk_cnt = 9, + .cntr7clk_cnt = 19, .cntr7clk_src = 0, .cntr8clk_cnt = 900, .cntr9clk_cnt = 900, @@ -24,19 +24,19 @@ static struct arria10_mainpll_cfg mainpll_cfg = { .nocdiv_l4spclk = 2, .vco0_psrc = 0, .vco1_denom = 1, - .vco1_numer = 127, + .vco1_numer = 159, .mpuclk = 0x3840001, - .nocclk = 0x3840003, + .nocclk = 0x3840004, }; static struct arria10_perpll_cfg perpll_cfg = { - .cntr2clk_cnt = 5, + .cntr2clk_cnt = 7, .cntr2clk_src = 1, .cntr3clk_cnt = 900, .cntr3clk_src = 1, - .cntr4clk_cnt = 14, + .cntr4clk_cnt = 19, .cntr4clk_src = 1, - .cntr5clk_cnt = 374, + .cntr5clk_cnt = 499, .cntr5clk_src = 1, .cntr6clk_cnt = 900, .cntr6clk_src = 0, @@ -50,5 +50,5 @@ static struct arria10_perpll_cfg perpll_cfg = { .gpiodiv_gpiodbclk = 32000, .vco0_psrc = 0, .vco1_denom = 1, - .vco1_numer = 119, + .vco1_numer = 159, }; |