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authorAhmad Fatoum <a.fatoum@pengutronix.de>2021-03-24 09:23:04 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-03-29 09:56:52 +0200
commitdd228f7615a2acefc5e29d28daa53b5ca39fe6fb (patch)
tree67fa549be1a43b1055c7959d22460531c96a0f33 /arch
parent8384ab79e06c4b618db2a915e3e1a5a50e06cecc (diff)
downloadbarebox-dd228f7615a2acefc5e29d28daa53b5ca39fe6fb.tar.gz
barebox-dd228f7615a2acefc5e29d28daa53b5ca39fe6fb.tar.xz
RISC-V: boot: move stack top to very end of memory
Now that the generic DT entry point used for QEMU virt takes care to prevent the PBL common code from overwriting the FDT, we can remove the 2M wasteland after the stack top. This reduces fragmentation on low memory platforms like erizo. Reported-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv/include/asm/barebox-riscv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/barebox-riscv.h b/arch/riscv/include/asm/barebox-riscv.h
index 948a562c5c..bb1d15308b 100644
--- a/arch/riscv/include/asm/barebox-riscv.h
+++ b/arch/riscv/include/asm/barebox-riscv.h
@@ -36,7 +36,7 @@ void *barebox_riscv_boot_dtb(void);
static inline unsigned long riscv_mem_stack_top(unsigned long membase,
unsigned long endmem)
{
- return endmem - SZ_2M;
+ return endmem;
}
static inline unsigned long riscv_mem_stack(unsigned long membase,