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authorChristoph Fritz <chf.fritz@googlemail.com>2020-03-11 12:06:29 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-03-16 12:28:53 +0100
commite6e12e9368f730d5e50c9495c2332abe2ad6abf0 (patch)
treee6b3267f578e8fa441ac80bd878f5daff0fd3aa5 /arch
parent93b1641c02caa2fe0f15d48f03b2362c8a0eee2e (diff)
downloadbarebox-e6e12e9368f730d5e50c9495c2332abe2ad6abf0.tar.gz
ARM: phytec-som-imx6: Add imx6dl with 512mb RAM
This patch adds support for a phyCORE-i.MX 6Solo/DualLight variant with 512mb RAM. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Stefan Riedmüller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg9
-rw-r--r--arch/arm/boards/phytec-som-imx6/lowlevel.c1
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg
new file mode 100644
index 0000000..5b92e58
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg
@@ -0,0 +1,9 @@
+#define SETUP_MDCFG0 \
+ wm 32 0x021b000c 0x3c409b85
+
+#define SETUP_MDASP_MDCTL \
+ wm 32 0x021b0040 0x00000017; \
+ wm 32 0x021b0000 0x83190000
+
+#include "flash-header-phytec-pcm058dl.h"
+#include <mach/habv4-imx6-gencsf.h>
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 900aa19..2e38baa 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -111,6 +111,7 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_lc_nand_256mb, imx6dl_phytec_phycore_som_lc_nand, SZ_256M, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_1gib, imx6dl_phytec_phycore_som_nand, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_512mb, imx6dl_phytec_phycore_som_emmc, SZ_512M, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_1gib, imx6dl_phytec_phycore_som_emmc, SZ_1G, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_lc_emmc_1gib, imx6dl_phytec_phycore_som_lc_emmc, SZ_1G, true);
PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true);