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author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2019-03-12 20:31:47 -0700 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-03-18 09:02:29 +0100 |
commit | f4634187cfda8db89121a5fbc88992ad79882db2 (patch) | |
tree | 527b152a6fce8ef0a1722265f3e74c3f5a175086 /arch | |
parent | 99ddaa5c52a3567f0ae928ce90c44e0976cf58ad (diff) | |
download | barebox-f4634187cfda8db89121a5fbc88992ad79882db2.tar.gz barebox-f4634187cfda8db89121a5fbc88992ad79882db2.tar.xz |
ARM: i.MX8MQ: Don't use cpu_is_mx8mq() at core_initcall level
Since __imx_cpu_type won't be initialized until
imx_init()@postcore_initcall is executed cpu_is_mx8mq() will only work
correctly at core_initcall level so long as imx_cpu_type does not
resolve into __imx_cpu_type. This is currently the case and
imx8mq_init_syscnt_frequency() works as expected, but it probably
won't be in the future.
To avoid this problem introduce imx8mq_cpu_lowlevel_init() and do
system counter frequency initialization there. Also convert all of the
i.MX8MQ boards to use this new function.
Fixes: 5691aed9a ("ARM: i.MX8MQ: Check CPU type in imx8mq_init_syscnt_frequency()")
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 2 | ||||
-rw-r--r-- | arch/arm/boards/phytec-som-imx8mq/lowlevel.c | 2 | ||||
-rw-r--r-- | arch/arm/boards/zii-imx8mq-dev/lowlevel.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/cpu_init.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx8mq.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-imx/include/mach/generic.h | 1 |
6 files changed, 13 insertions, 25 deletions
diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index ffbe14836f..6451e5d414 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -89,7 +89,7 @@ static void nxp_imx8mq_evk_sram_setup(void) */ ENTRY_FUNCTION(start_nxp_imx8mq_evk, r0, r1, r2) { - arm_cpu_lowlevel_init(); + imx8mq_cpu_lowlevel_init(); if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c index cfee13f3e7..e42e7a6fcc 100644 --- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c @@ -83,7 +83,7 @@ static void phytec_imx8mq_som_sram_setup(void) */ ENTRY_FUNCTION(start_phytec_phycore_imx8mq, r0, r1, r2) { - arm_cpu_lowlevel_init(); + imx8mq_cpu_lowlevel_init(); if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c index 059e4c9efd..0fd2ddfca5 100644 --- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c @@ -145,7 +145,7 @@ ENTRY_FUNCTION(start_zii_imx8mq_dev, r0, r1, r2) unsigned int system_type; void *fdt; - arm_cpu_lowlevel_init(); + imx8mq_cpu_lowlevel_init(); if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c index ba45a1aef5..7a980cf912 100644 --- a/arch/arm/mach-imx/cpu_init.c +++ b/arch/arm/mach-imx/cpu_init.c @@ -18,6 +18,7 @@ #include <linux/bitops.h> #include <mach/generic.h> #include <mach/imx7-regs.h> +#include <mach/imx8mq-regs.h> #include <common.h> #include <io.h> #include <asm/syscounter.h> @@ -66,4 +67,12 @@ void vf610_cpu_lowlevel_init(void) { arm_cpu_lowlevel_init(); } +#else +void imx8mq_cpu_lowlevel_init(void) +{ + arm_cpu_lowlevel_init(); + + if (current_el() == 3) + imx_cpu_timer_init(IOMEM(MX8MQ_SYSCNT_CTRL_BASE_ADDR)); +} #endif diff --git a/arch/arm/mach-imx/imx8mq.c b/arch/arm/mach-imx/imx8mq.c index 3f6b433a57..089344528d 100644 --- a/arch/arm/mach-imx/imx8mq.c +++ b/arch/arm/mach-imx/imx8mq.c @@ -27,28 +27,6 @@ #define FSL_SIP_BUILDINFO 0xC2000003 #define FSL_SIP_BUILDINFO_GET_COMMITHASH 0x00 -static int imx8mq_init_syscnt_frequency(void) -{ - if (!cpu_is_mx8mq()) - return 0; - - if (current_el() == 3) { - void __iomem *syscnt = IOMEM(MX8MQ_SYSCNT_CTRL_BASE_ADDR); - /* - * Update with accurate clock frequency - */ - set_cntfrq(syscnt_get_cntfrq(syscnt)); - syscnt_enable(syscnt); - } - - return 0; -} -/* - * This call needs to happen before timer driver gets probed and - * requests its update frequency via cntfrq_el0 - */ -core_initcall(imx8mq_init_syscnt_frequency); - int imx8mq_init(void) { void __iomem *anatop = IOMEM(MX8MQ_ANATOP_BASE_ADDR); diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h index be58da4da2..ac066e3f17 100644 --- a/arch/arm/mach-imx/include/mach/generic.h +++ b/arch/arm/mach-imx/include/mach/generic.h @@ -58,6 +58,7 @@ void imx6_cpu_lowlevel_init(void); void imx6ul_cpu_lowlevel_init(void); void imx7_cpu_lowlevel_init(void); void vf610_cpu_lowlevel_init(void); +void imx8mq_cpu_lowlevel_init(void); /* There's a off-by-one betweem the gpio bank number and the gpiochip */ /* range e.g. GPIO_1_5 is gpio 5 under linux */ |