diff options
| author | Lucas Stach <dev@lynxeye.de> | 2019-11-09 15:28:29 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-11-11 09:15:55 +0100 |
| commit | fee27d41640f4732f7df1648ba8c44b0f91153e3 (patch) | |
| tree | 49e5b612581e2dc2d40da743fbb801844c18fb8a /arch | |
| parent | 73671592a41dd39051339c8e17742cae31e53823 (diff) | |
| download | barebox-fee27d41640f4732f7df1648ba8c44b0f91153e3.tar.gz barebox-fee27d41640f4732f7df1648ba8c44b0f91153e3.tar.xz | |
clk: zynq: use base address of clock controller
The clock controller is a subregion of the SLCR, use the real base
of this region for mapping the registers. This will allow to switch
to DT based probing later.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-zynq/zynq.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-zynq/zynq.c b/arch/arm/mach-zynq/zynq.c index f6112fd249..ec22b16c91 100644 --- a/arch/arm/mach-zynq/zynq.c +++ b/arch/arm/mach-zynq/zynq.c @@ -48,7 +48,8 @@ static int zynq_init(void) writel(val, 0xf8f00000); dmb(); - add_generic_device("zynq-clock", 0, NULL, ZYNQ_SLCR_BASE, 0x4000, IORESOURCE_MEM, NULL); + add_generic_device("zynq-clock", 0, NULL, ZYNQ_SLCR_BASE + 0x100, + 0x4000, IORESOURCE_MEM, NULL); add_generic_device("smp_twd", 0, NULL, CORTEXA9_SCU_TIMER_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL); restart_handler_register_fn(zynq_restart_soc); |