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authorNishanth Menon <menon.nishanth@gmail.com>2008-09-11 10:25:09 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2008-09-15 10:11:05 +0200
commit2f620bb88c1cb8272d231bc33cda62611a8ed696 (patch)
treec43c9df93441fa3cdc3dbdaec38ea56d9fab9878 /board
parente9976b7268bd8a9aed45c989bff1aba4f01e338f (diff)
downloadbarebox-2f620bb88c1cb8272d231bc33cda62611a8ed696.tar.gz
barebox-2f620bb88c1cb8272d231bc33cda62611a8ed696.tar.xz
Board:OMAP:NAND introduce generic NAND support This introduces generic nand device support including common configurations used on various OMAP platforms
Signed-off-by: Nishanth Menon <x0nishan@ti.com>
Diffstat (limited to 'board')
-rw-r--r--board/omap/Kconfig74
-rw-r--r--board/omap/Makefile1
-rw-r--r--board/omap/devices-gpmc-nand.c139
3 files changed, 214 insertions, 0 deletions
diff --git a/board/omap/Kconfig b/board/omap/Kconfig
index 440d990f8f..625fdac556 100644
--- a/board/omap/Kconfig
+++ b/board/omap/Kconfig
@@ -39,6 +39,7 @@ config MACH_OMAP343xSDP
bool "Texas Instrument's SDP343x"
select MACH_HAS_LOWLEVEL_INIT
select OMAP_CLOCK_ALL
+ select HAS_OMAP_NAND
help
Say Y here if you are using SDP343x platform
@@ -46,6 +47,7 @@ config MACH_BEAGLE
bool "Texas Instrument's Beagle Board"
select MACH_HAS_LOWLEVEL_INIT
select OMAP_CLOCK_ALL
+ select HAS_OMAP_NAND
help
Say Y here if you are using Beagle Board
@@ -59,4 +61,76 @@ config MACH_OMAP_ADVANCED_MUX
Say Y here if you would like to have complete pin muxing to be
done at boot time
+config HAS_OMAP_NAND
+ bool
+
+
+menuconfig MACH_OMAP_GPMC_NAND
+ tristate "Enable NAND device support for GPMC"
+ depends on HAS_OMAP_NAND
+ default n
+ help
+ Say Y here if you would like to have NAND device support
+
+if MACH_OMAP_GPMC_NAND
+# Single definition used to club all generic definitions together
+config MACH_OMAP_GPMC_GENERICNAND
+ bool
+
+choice
+ prompt "Select NAND Device"
+
+config MACH_OMAP_GPMC_GENERICNAND_LP_X8
+ tristate "Enable 8 bit Large page nand"
+ depends on MACH_OMAP_GPMC_NAND
+ select MACH_OMAP_GPMC_GENERICNAND
+ help
+ Say Y here if you would support for 8 bit NAND
+ with large page
+ NOTE: The timing parameter are the most relaxed
+ If you need optimized timing, selec appropriate
+ supported NAND flash
+
+config MACH_OMAP_GPMC_GENERICNAND_LP_X16
+ tristate "Enable 16 bit Large page nand"
+ depends on MACH_OMAP_GPMC_NAND
+ select MACH_OMAP_GPMC_GENERICNAND
+ help
+ Say Y here if you would support for 16 bit NAND
+ with large page
+ NOTE: The timing parameter are the most relaxed
+ If you need optimized timing, selec appropriate
+ supported NAND flash
+
+config MACH_OMAP_GPMC_GENERICNAND_SP_X8
+ tristate "Enable 8 bit Small page nand"
+ depends on MACH_OMAP_GPMC_NAND
+ select MACH_OMAP_GPMC_GENERICNAND
+ help
+ Say Y here if you would support for 8 bit NAND
+ with small page
+ NOTE: The timing parameter are the most relaxed
+ If you need optimized timing, selec appropriate
+ supported NAND flash
+
+config MACH_OMAP_GPMC_GENERICNAND_SP_X16
+ tristate "Enable 16 bit Small page nand"
+ depends on MACH_OMAP_GPMC_NAND
+ select MACH_OMAP_GPMC_GENERICNAND
+ help
+ Say Y here if you would support for 16 bit NAND
+ with small page
+ NOTE: The timing parameter are the most relaxed
+ If you need optimized timing, selec appropriate
+ supported NAND flash
+endchoice
+
+config MACH_OMAP_CS
+ hex "NAND CS"
+ depends on MACH_OMAP_GPMC_NAND
+ default 0x0
+ help
+ Provide the Chip select of the NAND flash
+endif
+
endmenu
diff --git a/board/omap/Makefile b/board/omap/Makefile
index 211f3f72c4..002855a473 100644
--- a/board/omap/Makefile
+++ b/board/omap/Makefile
@@ -23,4 +23,5 @@
obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += platform.o
obj-$(CONFIG_MACH_OMAP343xSDP) += board-sdp343x.o
obj-$(CONFIG_MACH_BEAGLE) += board-beagle.o
+obj-$(CONFIG_MACH_OMAP_GPMC_GENERICNAND) += devices-gpmc-nand.o
diff --git a/board/omap/devices-gpmc-nand.c b/board/omap/devices-gpmc-nand.c
new file mode 100644
index 0000000000..d3d3ec91e3
--- /dev/null
+++ b/board/omap/devices-gpmc-nand.c
@@ -0,0 +1,139 @@
+/**
+ * @file
+ * @brief GPMC specific NAND devices
+ *
+ * FileName: board/omap/devices-gpmc-nand.c
+ *
+ * GPMC NAND Devices such as those from Micron, Samsung are listed here
+ */
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, <www.ti.com>
+ * Nishanth Menon <x0nishan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <console.h>
+#include <init.h>
+#include <driver.h>
+#include <clock.h>
+#include <asm/io.h>
+
+#include <asm/arch/silicon.h>
+#include <asm/arch/gpmc.h>
+#include <asm/arch/gpmc_nand.h>
+
+#ifdef CONFIG_MACH_OMAP_GPMC_GENERICNAND
+
+#define GPMC_CONF1_VALx8 0x00000800
+#define GPMC_CONF1_VALx16 0x00001800
+/* Set up the generic params */
+#ifdef CONFIG_MACH_OMAP_GPMC_GENERICNAND_LP_X8
+#define GPMC_NAND_ECC_LAYOUT GPMC_NAND_ECC_LP_x8_LAYOUT
+#define GPMC_CONF1_VAL GPMC_CONF1_VALx8
+#define GPMC_NAND_DEV_WIDTH 8
+#endif
+
+#ifdef CONFIG_MACH_OMAP_GPMC_GENERICNAND_LP_X16
+#define GPMC_NAND_ECC_LAYOUT GPMC_NAND_ECC_LP_x16_LAYOUT
+#define GPMC_CONF1_VAL GPMC_CONF1_VALx16
+#define GPMC_NAND_DEV_WIDTH 16
+#endif
+
+#ifdef CONFIG_MACH_OMAP_GPMC_GENERICNAND_SP_X8
+#define GPMC_NAND_ECC_LAYOUT GPMC_NAND_ECC_SP_x8_LAYOUT
+#define GPMC_CONF1_VAL GPMC_CONF1_VALx8
+#define GPMC_NAND_DEV_WIDTH 8
+#endif
+
+#ifdef CONFIG_MACH_OMAP_GPMC_GENERICNAND_SP_X16
+#define GPMC_NAND_ECC_LAYOUT GPMC_NAND_ECC_SP_x16_LAYOUT
+#define GPMC_CONF1_VAL GPMC_CONF1_VALx16
+#define GPMC_NAND_DEV_WIDTH 16
+#endif
+
+#ifdef CONFIG_NAND_OMAP_GPMC_HWECC
+/**
+ * The following is the organization of ECC as expected by BootROM.
+ * Based on the type of device, this can vary. select the config accordingly
+ */
+static struct nand_ecclayout boot_rom_ecc = GPMC_NAND_ECC_LAYOUT;
+#endif
+
+/** GPMC timing for our nand device */
+static struct gpmc_config nand_cfg = {
+ .cfg = {
+ GPMC_CONF1_VAL, /*CONF1 */
+ 0x00141400, /*CONF2 */
+ 0x00141400, /*CONF3 */
+ 0x0F010F01, /*CONF4 */
+ 0x010C1414, /*CONF5 */
+#ifdef CONFIG_ARCH_OMAP3
+ /* Additional bits in OMAP3 */
+ 0x1F040000 |
+#endif
+ 0x00000A80, /*CONF6 */
+ },
+
+ /* Nand: dont care about base address */
+ .base = 0x28000000,
+ /* GPMC address map as small as possible */
+ .size = GPMC_SIZE_16M,
+};
+
+/** NAND platform specific settings settings */
+static struct gpmc_nand_platform_data nand_plat = {
+ .cs = CONFIG_MACH_OMAP_CS,
+ .device_width = GPMC_NAND_DEV_WIDTH,
+ .max_timeout = MSECOND,
+ .wait_mon_pin = 0,
+#ifdef CONFIG_NAND_OMAP_GPMC_HWECC
+ .plat_options = NAND_HWECC_ENABLE,
+ .oob = &boot_rom_ecc,
+#else
+ .plat_options = NAND_HWECC_DISABLE,
+#endif
+ .priv = (void *)&nand_cfg,
+};
+
+/** NAND device definition */
+static struct device_d gpmc_generic_nand_nand_device = {
+ .name = "gpmc_nand",
+ .id = "gpmc_nand0",
+ .map_base = OMAP_GPMC_BASE,
+ .size = 1024 * 4, /* GPMC size */
+ .platform_data = (void *)&nand_plat,
+};
+
+/**
+ * @brief gpmc_generic_nand_devices_init - init generic nand device
+ *
+ * @return success/fail based on device funtion
+ */
+static int gpmc_generic_nand_devices_init(void)
+{
+ /* Configure GPMC CS before register */
+ gpmc_cs_config(nand_plat.cs, &nand_cfg);
+ return register_device(&gpmc_generic_nand_nand_device);
+}
+
+device_initcall(gpmc_generic_nand_devices_init);
+
+#endif /* CONFIG_MACH_OMAP_GPMC_GENERICNAND */
+
+/* All specific optimized nand configurations for GPMC NAND comes here */
+